Theory of Operation
1710J-Series Waveform Monitors
5–7
Vertical Output, Diagram 2
The filtered video signal drives the signal input of a gain cell whose gain is
controlled by the front-panel V CAL. The gain normalized video signal drives an
amplifier that can be clamped at back porch time with either a fast or slow time
constant clamp, which is also selected by front-panel selection.
The switchable gain amplifier input is the dc level shifted (vertical position)
output of the gain cell amplifier. Amplifier gain is switchable between X1 and
X5 as selected by the front-panel X5 VERTICAL GAIN. Amplifier output drives
a bridge limiter that prevents the vertical output amplifier from being overdriven.
The vertical output amplifier is driven by the processed video signal or, in Line
Select, by an appropriate combination of video and the Y-axis portion of the
readout signal. The output amplifier has enough gain to drive the CRT deflection
plates, while providing the compensation for the deflection plate capacitance.
Q684 drives the gain cell. It is a low impedance (to terminate the filters)
common base amplifier. The signal voltage off collector is approximately 0.5 V.
The gain cell (U578) is driven differentially; pin 1 is the signal input with a
–3.0 VDC level plus the signal voltage. R675 determines the maximum gain of
the gain cell. The amount of gain is controlled by varying the difference between
the bases of the two transistor pairs controlling the signal current flowing out of
pin 6 or pin 12. The front-panel V CAL control, R700, sets an input dc level on
pin 10 of the gain cell.
The current flowing out of pin 6 drives the Gain Cell Amplifier, while the
current flowing out of pin 12 drives into a collector load, R480.
The gain cell amplifier is a clamped inverting operational amplifier driving both
the switchable gain amplifier and the second DC restorer. It consists of Q673,
Q674, and Q669, with Q669, an emitter follower, operating as the output stage.
Amplifier gain is approximately 4.
The DC restorer clamps the output level of the gain cell amplifier to the dc level
occurring at back porch time. DC restorer drive is coupled through R474 into an
analog switch (U277B) that is activated by the BACKPORCH signal. U277B
closes during back porch time to charge the hold cap, C484. The error amplifier
(U488) drives a current summing point at the input of the gain cell amplifier
through U585D. For slow restorer, R484 is in the loop compensation. However;
for fast dc restorer, R484 is shorted to ground through U277C to speed up the
loop time constant. The position of J99 controls the action of U277C.
Gain Cell
Gain Cell Amplifier
Second DC Restorer
Summary of Contents for 1710J Series
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Page 18: ...Service Safety Summary xiv 1710J Series Waveform Monitors ...
Page 22: ...Preface xviii 1710J Series Waveform Monitors ...
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