Teknor Industrial Computers PCI-993, Technical Reference Manual

Page: 142 / 204

AMIBIOS Setup 15-16
NON-CACHE BLOCK1 SIZE
This option and the following option, Non-Cache Block1 Base, define the size of a
region of memory, Block-1, whose content cannot be read from or written to Cache
memory. The settings are Disabled, 64KB, 128KB, 256KB, 512KB, 1MB, 2MB and
4MB.
NON-CACHE BLOCK1 BASE
This option and the preceeding option, Non-Cache Block1 Size, define the base address
or starting point of a region of memory, Block-1, whose content cannot be read from or
written to Cache memory. The base address changes in increments equal to the
corresponding Non-Cache Block1 Size. If the setting of the Non-Cache Block1 Size
option is Disabled, this option will not be available.
NON-CACHE BLOCK2 SIZE
This option and the following option, Non-Cache Block2 Base, define the size of a
region of memory, Block-2, whose content cannot be read from or written to Cache
memory. The settings are Disabled, 64KB, 128KB, 256KB, 512KB, 1MB, 2MB and
4MB.
NON-CACHE BLOCK2 BASE
This option and the preceeding option, Non-Cache Block2 Size, define the base address
or starting point of a region of memory, Block-2, whose content cannot be read from or
written to Cache memory. The base address changes in increments equal to the
corresponding Non-Cache Block2 Size. If the setting of the Non-Cache Block2 Size
option is Disabled, this option will not be available.
CACHE TIMING
This option specifies the Cache memory access cycle. It should be set at Normal when
the CPU/Bus clock is 60 or 66 MHz. If the CPU/Bus clock is 50MHz, this option
should be set at Medium. The settings are Normal, Medium, Fast (not supported,
reserved for synchronous cache) and Turbo (not supported, reserved for synchronous
cache). CPU/Bus clock speed is set by the W19, W20 and W21 jumpers.