TallyGenicom 6600 Series, Maintenance Manual

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Chapter 7
Controller Board
“Cajun” Bus Interface
The “Cajun” bus connects the DC and the EC. The EC uses this bus to
access DC resources, including the semaphore registers. (The semaphore
registers are the primary communications path between the EC and DC.)
Ports
The V8 ASIC controls the following I/O functions:
•
Interface to IEEE® 1284 Level 2 host
•
Interface to RS-232-E serial host
•
Interface to RS-422-B serial host
All the circuitry required for these types of hosts is provided on the controller
board, except for the drivers themselves, ESD protection, and terminations.
Host I/O Drivers and Termination
Beyond the MPC8245 processor and V8 ASIC, additional support circuitry
completes the serial and parallel interfaces. These circuits include:
•
RS-232 drivers and receivers. These circuits use internal charge pumps
to eliminate the need for ± 12V power.
•
RS-422 differential drivers and receivers
•
Parallel port pull-up and pull-down terminating resistors in DIP
configuration for easy removal and installation.
All interface ICs and terminations have the following characteristics:
•
Provide ESD protection to 15KV for all inputs.
•
Less than 0.05V common mode ripple, measured at the power and
ground of the interface ICs.
•
Less than 0.02V common mode ripple, measured between chassis
ground and the ground pins of the interface ICs.
•
Greater than 200V/
μ
s slew rate for all outputs.
Engine Controller
The engine controller (EC) consists of four main elements:
•
80C167 Micro controller
•
128KB 5.0V-only FLASH program memory, organized as 64K x 16 bits.
This memory is not expandable.
•
MECA (Mechanism Engine Control ASIC)
•
Analog drive circuitry