Supero SuperServer 4048B-TRFT, User Manual

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Chapter 7: BIOS
7-23
DDR Speed
Use this feature to force a DDR3 memory module to run at a frequency other
than what is speci
fi ed in the speci fi cation. The options are
Auto
, 800, 1067,
1333, 1600, 1867, and 2133.
DDR Voltage Level
Select Force to 1.50V to force all DDR3 memory modules to operate at 1.50V.
Select Force to 1.35V to force all DDR3 memory modules to operate at 1.35V.
The options are
Auto
, Force to 1.50V, and Force to 1.35V.
Advanced Clk (Clock) Training
Select Enable for Advanced Clock Training support, which will allow the memory
command line to be synchronized with the clock line to enhance memory perfor-
mance. The options are
Enable
and Disable.
Perbit (Per-bit) Deskew Training
Select Enable for Perbit Deskew Training support, which will allow the memory
controller to include various adjustable delay circuits in both Read and Write
paths on a per-bit base for effective memory interface to maximize memory
performance. The options are
Disable
and Enable.
DDT Timing Mode
Use this feature to set the DDT (Distributed Debugging Tool) Timing mode for
the memory controller to enhance Graphical User Interface (GUI) support. The
options are
Aggressive Timing
and Conservative Timing.
MxB Rank Sharing Mapping
Use this feature to select the address-mapping setting for memory-rank sharing
to enhance extended multimedia platform performance. he options are
Maximum
Performance
and Maximum Margin.
DIMM Vref. (Voltage Reference) Circuit
This feature allows the user to decide how to con fi gure the voltage reference
point (gate) for a DDR3 memory module. The options are Internal and
External
.
BIOS VMSE Reset
If this feature is set to Enable, BIOS settings pertaining to the Intel Scalable
Memory Interconnect 2 (Intel SMI 2) controller will be reset to improve system
performance. The options are Disable and
Enable
.