Supero SUPER S2DG2 User'S And Bios Manual Download Page 4

Page: 4 / 96

S2DG2/S2DGU/S2DGE/S2DGR

User’s Manual

Chapter 5 has information on running setup and includes the default settings

for Standard Setup, Advanced Setup, Chipset Function, Power Management,

PCI/PnP Setup and Peripheral Setup.

Appendix A offers information on BIOS error beep codes and messages.

Appendix B shows post diagnostic error messages.

Summary of Contents for SUPER S2DG2

Page 1: ...SUPER S2DG2 SUPER S2DGU SUPER S2DGE SUPER S2DGR USER S AND BIOS MANUAL Revision 1 3 SUPER...

Page 2: ...chine without prior written consent IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT...

Page 3: ...to install the Pentium II III Xeon processor the retention mechanism and the heat sink support This chapter also provides you with instructions for handling static sensitive devices Read this chapter...

Page 4: ...unning setup and includes the default settings for Standard Setup Advanced Setup Chipset Function Power Management PCI PnP Setup and Peripheral Setup Appendix A offers information on BIOS error beep c...

Page 5: ...AGP Chip Set System Block Diagram 1 10 Motherboard Features 1 11 1 2 Chip Set Overview 1 13 1 3 Slot 2 Architecture 1 13 1 4 PC Health Monitoring 1 13 1 5 ACPI PC 98 Features 1 16 1 6 Power Supply Req...

Page 6: ...Save State Select 2 7 ATX PS 2 Keyboard and Mouse Ports 2 7 Universal Serial Bus 2 7 ATX Serial Ports 2 8 CMOS Clear 2 8 External Battery 2 8 Wake On LAN 2 8 Fan Connectors 2 8 Chassis Intrusion 2 9 S...

Page 7: ...p 5 1 5 1 1 Standard CMOS Setup 5 1 5 1 2 Advanced CMOS Setup 5 3 5 1 3 Advanced Chipset Setup 5 7 5 1 4 Power Management Setup 5 12 5 1 5 PCI PnP Setup 5 15 5 1 6 Peripheral Setup 5 17 5 2 Auto Detec...

Page 8: ...JBT1 JP20 S TERM JOH BZ_ON J36 Connectors J17 J18 J19 J20 J21 J32 J34 JA1 JA2 JA4 JBT2 JF1 JF2 JL1 SLED JT1 JT1A JT2 JT2A JT3 JT3A W O L Function Page CPU Core Bus Ratio Selection 2 4 CMOS Clear 2 8...

Page 9: ...ix Front Control Panel Front Control Panel Headers See pages 2 5 through 2 7 for pin definitions Keyboard lock Speaker IR Con Power On X Reset JF2 JF1 X Power LED 1 1 Hard Drive LED...

Page 10: ...x Notes Preface...

Page 11: ...s the complexity of managing the network Other features that maximize customer satisfaction and simplicity in managing the computer are its support for the PC 98 ready and and the Advanced Configu rat...

Page 12: ...SUPER S2DG2 S2DGU S2DGE S2DGR Manual 1 2 SUPER S2DG2 Figure 1 1 SUPER S2DG2 Motherboard Image...

Page 13: ...1 JA3 1 JT3A JT3 1 IDE 2 IDE 1 J16 OSC1 JPR1 PWR_SEC J7 J5 J4 J6 1 1 1 JOH Overheat L E D JP_WP C h a s s i s Intrusion SLED 1 BZ_ON J36 1 Manufacturer Settings JBT1 1 2 default 2 3 CMOS Clear To cle...

Page 14: ...SUPER S2DG2 S2DGU S2DGE S2DGR Manual 1 4 SUPER S2DGU Figure 1 3 SUPER S2DGU Motherboard Image...

Page 15: ...PD State default WOL Wake On LAN S TERM On SCSI Termination Enable Off Termination Disable PIIX4 GX J 1 9 Parallel Port J35 1 J L 2 1 J T M JB4 JB3 JB2 JB1 1 WOL JP18 1 J15 1 FLOPPY J22 JBT1 JBT2 S T...

Page 16: ...SUPER S2DG2 S2DGU S2DGE S2DGR Manual 1 6 SUPER S2DGE Figure 1 5 SUPER S2DGE Motherboard Image...

Page 17: ...nk1 Bank2 Bank3 JP16 JT2 JT1 1 J1 J2 ATX POWER JT2A JT1A 1 1 1 1 J32 1 JT3A JT3 1 IDE 2 IDE 1 J16 OSC1 JPR1 PWR_SEC J7 J5 J4 J6 1 1 1 JOH Overheat L E D JP_WP C h a s s i s Intrusion 1 BZ_ON J36 1 S U...

Page 18: ...SUPER S2DG2 S2DGU S2DGE S2DGR Manual 1 8 SUPER S2DGR Figure 1 7 SUPER S2DGR Motherboard Image...

Page 19: ...JP12 1 1 JP13 J3 J1 J2 JA7 JA5 JP20 JP18 1 1 BT2 1 SCSI LED JBT2 JBT1 1 BATTERY J5 J6 J7 J4 1 1 1 J22 6 0 ATX POWER JA3 1 JA1 JA2 1 J15 J16 FLOPPY JP11 C h a s s i s Intrusion BZ_ON JP_WP 1 1 1 JT2A J...

Page 20: ...s PCI Slots SMBus USB Ports USB IDE Ports ISA Slots BIOS SIO SCSI Figure 1 9 440GX AGP Chip Set System Block Diagram Dual Processors NOTE This is a general block diagram and may not represent the numb...

Page 21: ...support Chip Set Intel 440GX Expansion Slots S2DGR S2DG2 S2DGU S2DGE 4 PCI slots 5 PCI slots 2 ISA slots 2 ISA slots one PCI ISA shared slot one PCI ISA shared slot 1 AGP slot 1 AGP slot BIOS 2 Mb AM...

Page 22: ...RO 1130CA SA RAIDport II card S2DGR RAID port for Adaptec ARO 1130C RAIDport III card S2DG2 S2DGU 2 EIDE Bus Master interfaces support Ultra DMA 33 and Mode 4 1 floppy port interface 2 Fast UART 16550...

Page 23: ...s 3 3V DRAM technologies The control ler provides the interface to a PCI bus operating at 33 MHz This interface implementation is compliant with the PCI Rev 2 1 Specification The AGP inter face is bas...

Page 24: ...CPU fan is activated when the power is turned on It can be turned off when the CPU is in sleep mode When in sleep mode the CPU will not run at full power thereby generating less heat For power saving...

Page 25: ...gulator for the CPU Core The switching voltage regulator for the CPU core can support up to 20A current with the auto sensing voltage ID ranging from 1 3 to 3 5 volts This will allow the regulator to...

Page 26: ...structures while providing a processor architecture indepen dent implementation that is compatible with both Windows 98 and Windows NT 5 0 Microsoft OnNow The OnNow design initiative is a comprehensi...

Page 27: ...n LAN WOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup updates and asset tracking can occur after hours and on...

Page 28: ...ve FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rates of up to 115 2 Kbps as well as an advanced...

Page 29: ...hs Connectors on the S2DGU include one 68 pin 16 bit Ultra2 SCSI connector JA1 one 68 pin 16 bit Ultra Wide SCSI connector JA2 and one 50 pin 8 bit SCSI connector JA4 The controller allows you to conn...

Page 30: ...ws you to connect a total of 30 SCSI devices 15 for each channel with a maximum of 7 devices on the 50 pin SCSI connector The AIC 7896 consolidates the functions of two SCSI chips to eliminate the nee...

Page 31: ...irst remove the CPU s memory and other peripherals This warranty shall not apply to any failure or defect caused by misuse abnormal or unusually heavy use neglect abuse alteration improper installatio...

Page 32: ...SUPER S2DG2 S2DGU S2DGE S2DGR Manual 1 22 Notes...

Page 33: ...and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer system s chassis provides excellent conductivity between the power supply the case the m...

Page 34: ...proper locations Screw the base retention parts into the four Slot 2 mounting holes Note The DRM needs to be bolted through the motherboard to the chassis 4 Placing the fasteners Place a fastener on t...

Page 35: ...g holes ATX Standard Hole Extra for Slot 2 Extra for Slot 2 Back view of motherboard When mounting the motherboard to the chassis please note there are three holes specifically for mounting the Slot 2...

Page 36: ...be used to choose between optional settings Jumpers create shorts between two pins to change the function of the connector Pin 1 is identified with a square 2 4 Changing the CPU Speed To change the C...

Page 37: ...supply See Table 2 2 for pin definitions Table 2 2 ATX Power Supply Connector J32 Pin Number Definition 1 3 3V 2 3 3V3 3 Ground 4 5V 5 Ground 6 5V 7 Ground 8 PW OK 9 5VSB 10 12V Pin Number Definition...

Page 38: ...definitions Pin Number 9 10 Definition PW_ON Ground Table 2 5 PW_ON Header JF2 Table 2 7 Hard Drive LED Header JF1 Pin Number 1 2 3 4 Definition 5V HD Active HD Active 5V Pin Number 12 13 Definition G...

Page 39: ...the system recovers from an AC power failure In this state the power will not come on unless you hit the power switch on the motherboard PIIX4 control is used if you want the system to be in the powe...

Page 40: ...for pin definitions Position 1 2 Position 2 3 Normal CMOS Clear Table 2 13 ATX Serial Ports Pin Number Definition 1 DCD 2 DSR 3 Serial In 4 RTS 5 Serial Out Pin Number Definition 6 CTS 7 DTR 8 RI 9 G...

Page 41: ...rt DIMM modules in Bank 0 through Bank 3 as required for the desired system memory 2 Insert each DIMM module vertically into its socket Pay attention to the notches along the bottom of the module to p...

Page 42: ...ngle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with the twisted wires always connects to drive A and the connector without the...

Page 43: ...Number Function 1 Strobe 3 Data Bit 0 5 Data Bit 1 7 Data Bit 2 9 Data Bit 3 11 Data Bit 4 13 Data Bit 5 15 Data Bit 6 17 Data Bit 7 19 ACK 21 BUSY 23 PE 25 SLCT Pin Number Function 2 Auto Feed 4 Err...

Page 44: ...EL 62 CD 63 REQ 64 IO 65 DB 8 66 DB 9 67 DB 10 68 DB 11 Table 2 22 Ultra Wide SCSI Connector Pin Number Function 1 GND 2 GND 3 GND 4 GND 5 GND 6 GND 7 GND 8 GND 9 GND 10 GND 11 GND 12 Reserved 13 Open...

Page 45: ...8 DB 9 DB 10 DB 11 Connector Contact Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Signal Names DB 12 DB 13 DB 14 DB 15 DB P1 DB 0 DB 1 DB 2 DB 3...

Page 46: ...TB GND SBA4 SBA6 KEY KEY KEY KEY AD31 AD29 VCC3 3 AD27 AD25 GND AD_STB1 AD23 A 12V Spare Reserved USB GND INTA RST GNT VCC3 3 ST1 Reserved PIPE GND Spare SBA1 VCC3 3 SBA3 Reserved GND SBA5 SBA7 KEY KE...

Page 47: ...r the video graphics card Be sure the video graphics card is inserted properly 4 Install a CPU the chassis speaker and the power LED to the mother board Check all jumper settings as well 5 Install a m...

Page 48: ...rs settings clock speed and voltage settings 4 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes NOTE If you are a system integrator VAR or OEM a POST...

Page 49: ...roblem s with the specific system configuration that was sold to you 3 BIOS upgrades can be downloaded from the SUPER BBS 408 895 2022 24 hours a day using 1200 28800 baud 8 data bits 1 stop bit and n...

Page 50: ...of 64 and 72 bit wide memory will disable ECC mode 2 Registered SDRAM and unbuffered SDRAM cannot be mixed 3 Mixing PC 100 DIMM and PC 66 DIMM will result in an unexpected memory count or system erro...

Page 51: ...ystem off and place the floppy disk with the saved BIOS image file see above FAQ in drive A Depress and hold CTRL and Home at the same time then turn on the power keeping these keys depressed until yo...

Page 52: ...hen this feature is enabled in the BIOS the motherboard will have instant off capabilities as long as the BIOS has control of the system When this feature is disabled or when the BIOS is not in contro...

Page 53: ...rchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Re...

Page 54: ...3 8 SUPER S2DG2 S2DGU S2DGE S2DGR Manual Notes...

Page 55: ...m information when the computer is turned off The original IBM AT had 64 bytes of non volatile memory storage in CMOS RAM All AT compatible systems have at least 64 bytes of CMOS RAM which is usually...

Page 56: ...M AMIBIOS supports the LS120 drive made by Matsushita Kotobuki Electronics Industries Ltd The LS120 Can be used as a boot device Is accessible as the next available floppy drive AMIBIOS supports PC He...

Page 57: ...Q 10 PCI Onboard SCSI IRQ 10 PCI Slot 4 VGA IRQ 11 AMIBIOS Setup See the following page for examples of the AMIBIOS Setup screen which features options and settings Figure 4 1 shows the Standard optio...

Page 58: ...p Advanced Chipset Setup Power Management Setup PCI Plug and Play Setup Peripheral Setup Auto Detect Hard Disks Change User Password Change Supervisor Password Change Language Setting Auto Configurati...

Page 59: ...option Select the Date Time icon The current values for each category are displayed Enter new values through the keyboard Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy dr...

Page 60: ...diameter diminishes Yet each sector must still hold 512 bytes Write precompensation circuitry on the hard disk compensates for the physical difference in sector size by boosting the write current for...

Page 61: ...MB AMIBIOS does not wait for up to 40 seconds for a READY signal from the IDE hard disk drive If a READY signal is not received immediately from the IDE drive AMIBIOS does not configure that drive AM...

Page 62: ...The BIOS will attempt to read the boot record from 1st 2nd 3rd and 4th boot device in the selected order until it is successful in reading the booting record The BIOS will not attempt to boot from an...

Page 63: ...re device failures S M A R T should be used as a warning tool not as a tool to predict the device reliability Boot Up Num Lock Settings for this option are On or Off When this option is set to On the...

Page 64: ...e written to and read from cache memory CPU ECC The settings for this option are Enabled or Disabled This option enables Pentium II L2 cache ECC function MPS Revision 1 4 Settings for this option are...

Page 65: ...Enabled to enable the SERR signal on the bus GX asserts this signal to indicate a system error condition SERR is asserted under the following conditions In an ECC configuration the GX asserts SERR for...

Page 66: ...o I O GX Master Latency Timer CLKs This option specifies the master latency timings in PCI clocks for devices in the computer The settings are Disabled 32 64 96 128 160 192 or 224 Multi Trans Timer Cl...

Page 67: ...time the error occurs in the same location a Parity Error is reported indicating an uncorrectable error If ECC is selected AMIBIOS automatically enables the System Management Interface SMI If you do...

Page 68: ...feature ACPI Control Register The settings for this option are Enabled or Disabled Set this option to Enabled to enable the ACPI Advanced Configuration and Power Interface control register Gated Clock...

Page 69: ...on specifies the length of a delay inserted between consecutive 8 bit I O operations The settings are Disabled 8 SYSCLKs 1 SYSCLK 2 SYSCLKs 3 SYSCLKs 4 SYSCLKs 5 SYSCLKs or 6 SYSCLKs 16bit I O Recover...

Page 70: ...y the bus that the specified DMA channel can be used on The settings are PC PCI Distributed or Normal ISA Memory Buffer Strength The settings for this option are Strong Medium or Auto Manufacturer s S...

Page 71: ...own Mode This option specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired The settings are Disabled Standby or Suspend N...

Page 72: ...savings state The settings are Monitor or Ignore Device 6 Serial port 1 Device 7 Serial port 2 Device 8 Parallel port Device 5 Floppy disk Device 0 Primary Master IDE Device 1 Primary Slave IDE Device...

Page 73: ...abled For example if there are two VGA devices in the computer one PCI and one ISA and this option is disabled data read and written by the CPU is only directed to the PCI VGA device s palette registe...

Page 74: ...d INTA INTB INTC or INTD PCI Slot1 IRQ Priority PCI Slot2 IRQ Priority PCI Slot3 IRQ Priority PCI Slot4 IRQ Priority These options specify the IRQ priority for PCI devices installed in the PCI expansi...

Page 75: ...his option specifies the beginning address in hex of the reserved memory area The specified ROM memory area is reserved for use by legacy ISA adapter cards The settings are C0000 C4000 C8000 CC000 D00...

Page 76: ...re CPU I O 3 3V 5V 5V 12V and 12V and three fan status monitors On Board FDC This option enables the FDC Floppy Drive Controller on the motherboard The settings are Disabled or Enabled On Board Serial...

Page 77: ...ion Note The Optimal default setting for this option is Bi Dir and the Fail Safe setting is Normal EPP Version The settings are 1 7 or 1 9 Note The Optimal and Fail Safe default settings are N A Paral...

Page 78: ...ord check option is enabled in the Advanced Setup by choosing either Always or Setup The password is stored in CMOS RAM You can enter a password by typing the password on the keyboard selecting each l...

Page 79: ...ion with Optimal Settings The Optimal default settings provide optimum performance settings for all devices and system features 5 5 2 Auto Configuration with Fail Safe Settings The Fail Safe default s...

Page 80: ...BIOS User s Manual 5 22 Notes...

Page 81: ...on the screen Fatal errors are those which will not allow the system to continue the boot up procedure If a fatal error occurs you should consult with your system manufacturer for possible repairs Th...

Page 82: ...r 6 8042 Gate A20 Failure The keyboard controller 8042 contains the Gate A20 switch which allows the CPU to operate in virtual mode This error means that the BIOS cannot switch the CPU into protected...

Page 83: ...it still beeps replace the keyboard controller If it still beeps try a different keyboard or replace the keyboard fuse if the keyboard has one 8 times there is a memory error on the video adapter Repl...

Page 84: ...Timer Error Most ISA computers include two times There is an error in time 2 CMOS Battery State Low CMOS RAM is powered by a battery The battery power is low Replace the battery CMOS Checksum Failure...

Page 85: ...low the on screen instructions Display Switch Some computers require a video switch on Not Proper the motherboard be set to either color or monochrome Turn the computer off set the switch then power o...

Page 86: ...No ROM BASIC Cannot find a bootable sector on either disk drive A or hard disk drive C The BIOS calls INT 18h which generates this message Use a bootable disk Off Board Parity error in memory installe...

Page 87: ...ing cache memory 06 Uncompressing the post code unit next 07 Next initializing the CPU init and the CPU data area 08 The CMOS checksum calculation is done next 0B Next performing any required initiali...

Page 88: ...14 The 8254 timer test will begin next 19 The 8254 timer test is over Starting the memory refresh test next 1A The memory refresh test line is toggling Checking the 15 second on off time next 23 Read...

Page 89: ...ol to BIOS POST Performing any required processing after the video ROM had control 2E Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read...

Page 90: ...next 45 Data initialized Checking for memory wraparound at 0 0 and finding the total system memory size next 46 The memory wraparound test has completed The memory size calculation has been completed...

Page 91: ...djusting the displayed memory size for relocation and shadowing next 51 The memory size display was adjusted for relocation and shadowing Testing the memory above 1 MB next 52 The memory above 1 MB ha...

Page 92: ...he output buffer and checking for stuck keys Issuing the keyboard reset command next 81 A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next 82 The...

Page 93: ...mouse check and extended BIOS data area allocation check next 8C Programming the WINBIOS Setup options next 8D The WINBIOS Setup options are programmed Resetting the hard disk controller next 8F The h...

Page 94: ...alization after the Coprocessor test next 9E Initialization after the Coprocessor test is complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next...

Page 95: ...1 Copying any code to specific areas D0h The NMI is disabled Power on delay is starting Next the initialization cade checksum will be verified D1h Initializing the DMA controller Performing the keyboa...

Page 96: ...BIOS User s Manual B 10 If either Ctrl Home was pressed or the system BIOS checksum is bad the system will next go to checkpoint code E0h Otherwise going to checkpoint code D7h...

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