Sony PCS-1500, Service Manual

Page: 107 / 198

3-17
PCS-1500/1500P
[UART block]
Fig. 3-9 UART Block
Fig. 3-9 shows the connection of the UART block.
The combination of IC201 (UART) and IC203 (Transceiver) is used for the T.120 port. IC201 operating
clock (3.6864 MHz) is generated by the crystal oscillator (X200). IC203 shuts down when the “SLEEP”
signal coming from the CPU block goes low. All of the control lines are available at the T.120 port.
The combination of IC202 (UART) and IC204 (Transceiver) is used for the camera (PCS-C150/C150P).
The operating clock of IC202 is the output of IC201. The control lines other than the DTR are not used,
but are looped back. The general-purpose output ports of IC202 are used for the “A25” and “REQ/REG”
signal of the PCMCIA interface.
IC201 and IC202 are reset by the “RES_ALL” signal that is supplied from the CPU block. Interrupt
signals are output from IC201 and IC202 respectively.
It operates on the
+
5 V power supply voltage.
UART(IC201)
XR16C850
TXD
\CS
\RESET
\CD
A0-2
\IOR
\CTS
8
3
RXD
\DTR
\DSR
\RI
\RTS
\IOW
D0-7
HCS_USR
HA1-3
\HRD
\HWR
HD0-7
XTAL2
RES_ALL
from/to
CPU BLOCK
Transceiver(IC203)
MAX3241CAI
\SHDN
\SLEEP
from/to
T.120 Port
UART(IC202)
ST16C550
TXD
\CS
\RESET
\CD
A0-2
\IOR
\CTS
8
3
RXD
\DTR
\DSR
\RTS
\IOW
D0-7
HCS_CAM
HA1-3
\HRD
\HWR
HD0-7
XTAL1
RES_ALL
from/to
CPU BLOCK
Transceiver(IC204)
MAX3222CAP
from/to
Camera
\OP1
\OP2
to PCMCIA BLOCK
IRQ_USR INT IRQ_CAM INT
3-2. Circuit Description of the Respective Boards