PV 2208 User Manual
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3-5 CHIPSET FEATURES SETUP
We recommend that only system designers, service personnel, and technically
component users make changes to this screen. Resetting, or changing any on the
values make cause unforeseen changes to the system.
NOTE: Due to the variety of different system board designers all the fields described
in this section may not be included in your BIOS software.
Bank 0/1, 2/3, 4/5 DRAM Timing
The DRAM timing of Bank 0/1, 2/3, 4/5, 6/7 in this field is set by the
system board manufacturer, depending on whether the board has fast
paged DRAMs or EDO (extended data output) DRAMs.
The Choice: SDRAM 10ns,SDRAM 8ns,Normal, Medium, Fast, Turbo.
SDRAM Cycle Length
This category will allow you to set the SDRAM system length; your choices are 2, or
3.
DRAM Clock
This category allows you to set the DRAM clock using, Host CLK, or HCLK+33M.