SMART Embedded Computing COMX-P2020 BSP, Installation And Use Manual

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72 COMX-P2020 Module Installation and Use (6806800K97F)
Functional Description
Functional Description
4.3.4 EEPROM
The COMX-P2020 uses two 256x8 (2Kbit) I
2
C EEPROMs. One for boot up configuration
and another for storing module type information.
4.4 Video
COMX-P2020 has an on-board GPU Z11M which supports the following:
 VGA
 LVDS (requires an external DVO to LVDS transmitter)
GPU Z11M integrates a PCI-E 1x controller and a 64-bit 2D graphics engine. It also has a
4Mx16bit DDR memory.
4.5 I
2
C
4.5.1 I
2
C Bus
There are two inter-IC (IIC or I
2
C) bus interfaces implemented on this device. All of the
interfaces will operate at the master mode.
4.5.2 I
2
C EEPROM
There are two I
2
C EEPROMs AT24C02B which are located on I2C#1. One is for ID
EEPROM (storing board serial number, MAC address etc.) and the other is for Processor
EEPROM (storing processor ID etc). Their I
2
C addresses are 0xA0 and 0xA8 separately.
To access Processor EEPROM, the I
2
C switch must connect MUX_I2C#0.
4.5.3 PCA9545
The PCA9545 is a quad bi-directional translating switch controlled using the I
2
C bus.The
I
2
C address of PCA9545 is E0. The SCL/SDA upstream pair fans out to four downstream
pairs or channels. Any individual SCx/SDx channel or combination of channels can be
selected, determined by the contents of the programmable control register.