Rev. 1.0
119
Si4010-C2
SFR Address = 0xA4
SFR Address = 0x90
SFR Definition 30.2. P0CON
Bit
7
6
5
4
3
2
1
0
Name
P0CON[7:0]
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
Name
Function
7:0 P0CON[7:0]
Port 0 Configuration Register, for GPIO[7:0].
This bit controls configuration of each corresponding output bit in P0.
0 .. open-drain
1 .. push-pull
If the pin to be input, it must be configured as open-drain and 1 has to be written as
output value to it.
SFR Definition 30.3. P1
Bit
7
6
5
4
3
2
1
0
Name
P1[7:0]
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
1
1
Bit
Name
Function
7:0
P1[7:0]
Port 1 Register GPIO[15:8], Bit Addressable.
Write appears at the GPIO[15:8] outputs, read reads directly the GPIO input values.
Same as for P0. Only GPIO[9:8] are used, write to the rest of the register has no
effect, read returns 0 at those bits.
