background image

57

 

57

 

 

   Pad List 

 

57

 

 

Appendix E

 

Pad List 

A2 

RTC_XTALO 

A3 

RTC_XTALI 

A4 

GND 

A5 

USB_DEV_P 

A6 

USB_DEV_N 

A7 

GND 

A8 

USB_VBUS1 

A9 

Reserved_NC 

A10 

ONOFF 

A11 

nRST_IN 

A12 

MODULE_RDY 

A13 

Reserved_NC 

A14 

GPLED 

A15 

GND 

A16 

GND 

A17 

GND 

A18 

VDD_3V3 

A19 

VDD_3V3 

A20 

VDD_3V3 

A21 

GND 

A22 

GND 

A23 

GND 

B1 

RXD1 

B2 

LOGLED 

B3 

Reserved_NC 

B4 

GND 

B5 

GND 

B6 

GND 

B7 

GND 

B8 

VDD_BAT 

B9 

Reserved_NC 

B10 

Reserved_NC 

B11 

Reserved_NC 

B12 

Reserved_NC 

B13 

GND 

B14 

Reserved_NC 

B15 

Reserved_NC 

B16 

PMIC_ON_REQ 

B17 

GND 

B18 

VDD_3V3 

B19 

VDD_3V3 

B20 

VDD_3V3 

B21 

GND 

B22 

Reserved_NC 

B23 

Reserved_NC 

C1 

RTS1 

C2 

Reserved_NC 

C3 

Reserved_NC 

C4 

GND 

C5 

Reserved_NC 

C6 

Reserved_NC 

C7 

GND 

C8 

Reserved_NC 

C9 

Reserved_NC 

C10 

Reserved_NC 

C11 

Reserved_NC 

C12 

Reserved_NC 

C13 

Reserved_NC 

C14 

Reserved_NC 

C15 

GND 

C16 

GND 

C17 

GND 

C18 

VDD_3V3 

C19 

VDD_3V3 

C20 

VDD_3V3 

C21 

Reserved_NC 

C22 

Reserved_NC 

C23 

GND 

D1 

TXD1 

D2 

GND 

D3 

RXD4 

D21 

GND 

D22 

GND 

D23 

GND 

E1 

CTS1 

E2 

GND 

E3 

TXD4 

E21 

GND 

E22 

GND 

E23 

GND 

F1 

RXD2 

F2 

nRST_LAN 

F3 

Reserved_NC 

F21 

GND 

F22 

GND 

F23 

GND 

G1 

RTS2 

G2 

GND 

G3 

Reserved_NC 

G21 

GND 

G22 

Reserved_NC 

G23 

GND 

H1 

TXD2 

H2 

RMII_TX1 

H3 

Reserved_NC 

H21 

GND 

H22 

GND 

H23 

GND 

J1 

CTS2 

J2 

RMII_TX0 

J3 

Reserved_NC 

J21 

GND 

J22 

GND 

J23 

GND 

K1 

RXD3 

K2 

GND 

K3 

LOGBUTTON 

K21 

GND 

K22 

GND 

K23 

GND 

L1 

RTS3 

L2 

RMII_TXEN 

L3 

GP2 

L21 

GND 

L22 

GND 

L23 

GND 

M1 

TXD3 

M2 

RMII_RXER 

M3 

GPLED2 

M21 

GND 

M22 

GND 

M23 

2V8_IN 

N1 

CTS3 

N2 

RMII_CRSDV 

N3 

Reserved_NC 

N21 

GND 

N22 

GND 

N23 

2V8_OUT 

P1 

GND 

P2 

GND 

P3 

GND 

P21 

GND 

P22 

GND 

P23 

VANT 

R1 

Reserved_NC 

R2 

RMII_RXD0 

R3 

GND 

R21 

GND 

R22 

GND 

R23 

VANT 

T1 

Reserved_NC 

T2 

RMII_RXD1 

T3 

Reserved_NC 

T21 

GND 

T22 

GND 

T23 

GND 

U1 

Reserved_NC 

U2 

GND 

U3 

Reserved_NC 

U21 

GND 

U22 

GND 

U23 

GND 

V1 

Reserved_NC 

V2 

MDC 

V3 

Reserved_NC 

V21 

GND 

V22 

GND 

V23 

ANT_2 

W1 

Reserved_NC 

W2 

MDIO 

W3 

Reserved_NC 

W21 

GND 

W22 

GND 

W23 

GND 

Y1 

SD1_DATA0 

Y2 

GND 

Y3 

Reserved_NC 

Y21 

GND 

Y22 

GND 

Y23 

GND 

AA1 

SD1_CLK 

AA2 

RMII_CLK 

AA3 

Reserved_NC 

AA4 

GP1 

AA5 

Reserved_NC 

AA6 

Reserved_NC 

AA7 

Reserved_NC 

AA8 

Reserved_NC 

AA9 

Reserved_NC 

AA10 

Reserved_NC 

AA11 

Reserved_NC 

AA12 

Reserved_NC 

AA13 

GND 

AA14 

GND 

AA15 

GND 

AA16 

GND 

AA17 

GND 

AA18 

GND 

AA19 

GND 

AA20 

GND 

AA21 

GND 

AA22 

GND 

AA23 

GND 

AB1 

SD1_CMD 

AB2 

GND 

AB3 

GND 

AB4 

GND 

AB5 

GND 

AB6 

GND 

AB7 

Reserved_GND 

AB8 

GND 

AB9 

Reserved_NC 

AB10 

Reserved_NC 

AB11 

Reserved_NC 

AB12 

Reserved_NC 

AB13 

GND 

AB14 

GND 

AB15 

GND 

AB16 

GND 

AB17 

GND 

AB18 

GND 

AB19 

GND 

AB20 

GND 

AB21 

GND 

AB22 

GND 

AB23 

GND 

AC1 

Reserved_NC 

AC2 

Reserved_NC 

AC3 

SYNC 

AC4 

1V8_OUT 

AC5 

Reserved_NC 

AC6 

EVENTA 

AC7 

EVENTB 

AC8 

PPSO 

AC9 

Reserved_NC 

AC10 

Reserved_NC 

AC11 

Reserved_NC 

AC12 

Reserved_NC 

AC13 

GND 

AC14 

VTUNE 

AC15 

GND 

AC16 

REF_O 

AC17 

REF_I 

AC18 

GND 

AC19 

GND 

AC20 

ANT_1 

AC21 

GND 

AC22 

GND 

AC23 

GND 

 

Summary of Contents for mosaic Series

Page 1: ...Mosaic Hardware Manual Version 1 7 0 ...

Page 2: ... Version 1 7 0 September 7 2022 Copyright 2000 2022 Septentrio nv sa All rights reserved Septentrio Greenhill Campus Interleuvenlaan 15i 3001 Leuven Belgium http www septentrio com Phone 32 16 300 800 Fax 32 16 221 640 septentrio ...

Page 3: ...nmental 12 4 PINOUT AND I O DESCRIPTION 13 4 1 Power Supply 14 4 2 Antenna s 14 4 2 1 Main Antenna 14 4 2 2 Auxiliary Antenna 15 4 2 3 Typical Application 16 4 3 COM Ports 17 4 3 1 Typical Application 17 4 4 USB Device Interface 18 4 4 1 Typical Application 18 4 5 Ethernet 19 4 5 1 Typical Application 19 4 6 SD Memory Card 20 4 6 1 Typical Application 21 4 6 2 Data Logging 21 4 7 Clock Frequency R...

Page 4: ...0 5 3 Decoupling 31 5 4 Power States 31 5 5 Layout Recommendations 32 5 5 1 Coplanarity 32 5 5 2 Power 32 5 5 3 Antenna Inputs 32 5 5 4 Avoiding Self Interference 33 6 PRODUCT HANDLING 34 6 1 ESD Precautions 34 6 2 ROHS WEEE NOTICE 34 6 3 Packaging 35 6 3 1 Packing List Label 36 6 3 2 MSL Level Label 36 6 4 Storage 37 6 4 1 Note for Small Quantities 37 6 5 Sticker and Identification 37 6 6 Solderi...

Page 5: ...ket 45 8 EVALUATION KIT MOSAIC GO 46 8 1 Interfaces 46 8 1 1 USB 46 8 1 2 RSV USB 46 8 1 3 RF_IN1 and RF_IN2 46 8 1 4 TF Card 47 8 1 5 6 pin Connector 47 8 1 6 4 pin Connector 47 8 2 Accessories 47 8 2 1 6 pin COM1 Open Ended Cable 48 8 2 2 4 pin COM2 Open Ended Cable 48 8 3 LEDs 48 8 4 Powering the mosaic go 48 APPENDIX A LED STATUS INDICATORS 49 APPENDIX B SYSTEM NOISE FIGURE AND C N0 51 APPENDI...

Page 6: ...6 6 6 APPENDIX E PAD LIST 57 ...

Page 7: ...020 Added a note that the RTC_XTALI pin must be tied to ground 1 4 0 Dec 2020 Added description of the dual antenna mosaic H Added complete pad list in appendix 1 5 0 Sep 2021 Added frequency plan in the Overview section Added description of the mosaic go evaluation kit Added mosaic H RF Gain Adjustment appendix 1 6 0 Mar 2022 Added documentation of the GPLED2 pin pin M3 Added mosaic CLAS frequenc...

Page 8: ... 5 5V DC voltage can be applied to the main antenna from the VANT pin obviating the need for an external antenna supply The internal bias control circuit detects overcurrent conditions 150mA and protects the module in case of short circuit See section 4 2 The module can use its internal TCXO as frequency reference but also accepts an external frequency reference on the REF_I pin mosaic T only See ...

Page 9: ...ures The frequency bands in blue are supported mosaic model Ants Time Freq sync Supported Frequency Bands per Antenna mosaic X5 1 No mosaic Sx 1 No mosaic T 1 Yes mosaic CLAS 1 No mosaic H 2 No mosaic H can be configured in two different band plans applicable to both antennas By default mosaic H operates in band plan 1 with the E5b B2b B2I band enabled Band plan 2 with B3 enabled instead of E5b B2...

Page 10: ...n the shield Land plating Nickle Gold Array 23 x 23 three outer rows Number of terminals 239 3 3 Absolute Maximum Ratings The following conditions should never be exceeded even momentarily as it may cause permanent damage to the module Parameter Comment Min Max Units VDD_3V3 voltage See 4 1 0 3 3 6 V VDD_BAT voltage See 4 12 0 3 3 6 V VANT voltage See 4 2 0 3 5 5 V 3V3_LVTTL input pin voltage 0 3 ...

Page 11: ...age 2 744 2 8 2 856 V VDD_3V3 current 160 210 500 mA VDD_BAT input current 0 03 1 mA USB_VBUS1 input current See 4 4 10 50 mA 1V8_OUT output current 120 mA 2V8_OUT output current 100 mA VANT input current 150 mA 3 4 2 I O Parameter Comment Min Typ Max Units VIH 1 8V inputs 0 7 1V8_OUT V VIL 1 8V inputs 0 3 1V8_OUT V Input capacitance 1 8V inputs 2 0 pF Pull down 1 8V inputs 80 210 515 kOhm VOH 1 8...

Page 12: ... phase 3 RTK 1Hz 850 258 GPS GLONASS L1 L2 GALILEO L1 E5a BeiDou B1C B2a phase 3 RTK 100 Hz 930 282 GPS GLONASS L1 L2 L band PPP 1Hz 760 230 All signals from all GNSS constellations Static 1Hz 910 276 All signals from all GNSS constellations L band Static 1Hz 980 297 All signals from all GNSS constellations L band Static 100Hz 1080 327 Dual Antenna Modules GNSS Signals Positioning Mode Power mW Cu...

Page 13: ...GA pads configured as follows The following sections describe all the non reserved pads Pads are grouped by functions A complete pad list can be found in Appendix E Conventions Pin Type I Input O Output P Power Ctrl Control Clk Reference clock PU pulled up PD pulled down K keeper input type ...

Page 14: ...hich can for example be used to power level shifters for the 1V8_LVTTL signals EVENT and PPS see for example section 4 8 The module can also control an external power switch to enable standby mode See section 4 12 for details See also the power state diagram in section 5 4 4 2 Antenna s 4 2 1 Main Antenna The main antenna which is the only antenna on single antenna modules is directly connected to...

Page 15: ...le in the ReceiverStatus SBF block and shown in the web interface or the RxControl GUI The conversion formula from the reported AGC gain to the pre amplification gain is Pre amp gain dB 65 AGCgain dB So if the receiver reports an AGC gain of 30dB the pre amplification gain is 35dB 2 The listed noise figure is at room temperature Add 2 dB for the noise figure at the worst temperature corner 85 C DC...

Page 16: ... With this circuit the DC bias from the ANT_1 pad is shared between the two antennas Note that the combined current drawn by both antennas must not exceed 150mA in that case Refer to 5 5 3 for RF routing recommendations If the pre amplification gain is higher than 35dB it is recommended to put attenuators in the RF path See Appendix C for instructions In addition the ANT_1 and ANT_2 pre amplificat...

Page 17: ... Serial COM3 receive line inactive state is high RTS3 O 3V3_LVTTL Serial COM3 RTS line The module drives this pin low when ready to receive data CTS3 I PU 3V3_LVTTL Serial COM3 CTS line Must be driven low when ready to receive data from the module TXD4 O 3V3_LVTTL Serial COM4 transmit line inactive state is high RXD4 I PU 3V3_LVTTL Serial COM4 receive line inactive state is high Unused COM port si...

Page 18: ...s unused this pin shall be left floating This pin powers the integrated PHY of the USB interface USB_DEV_N I O USB USB data signal negative USB_DEV_P I O USB USB data signal positive USB is configured in USB 2 0 mode high speed 480Mbps max 4 4 1 Typical Application An example of an USB application circuit with ESD protection is shown below The user shall make sure to use an ESD protection and comm...

Page 19: ...TL LAN PHY CRS RMII_RXER I PU 3V3_LVTTL LAN PHY RX error RMII_TXEN O 3V3_LVTTL LAN PHY transmit enable RMII_TXD0 O 3V3_LVTTL LAN PHY transmit data 0 RMII_TXD1 O 3V3_LVTTL LAN PHY transmit data 1 nRST_LAN O 3V3_LVTTL LAN reset low to reset the PHY When connecting this pin to enable an Ethernet PHY add a 10k pull down If Ethernet is not used all these pins should be left unconnected Hostname the mod...

Page 20: ...s can be found in Septentrio s Knowledge Base pages https customersupport septentrio com s article which ethernet phy does mosaic support 4 6 SD Memory Card The module can interface to an external SD memory card through the pins listed in the table below Pin Name Type Level Description Comment SD_CLK O 3V3_LVTTL SD card CLK line SD_CMD O 3V3_LVTTL SD card CMD line SD_DAT0 I O 3V3_LVTTL SD card DAT...

Page 21: ...g an open collector output or a push pull output The module debounces the signal in software so no external debouncing circuit is required See instructions in the Reference Guide for details on how to configure SD card logging The module is compatible with SD cards of up to 32GB The file system is FAT32 When powering off the module while logging the last seconds of data may be lost To avoid data l...

Page 22: ...connected to REF_O those pins are next to each other 2V8_IN must be connected to 2V8_OUT those pins are next to each other Do not use the 2V8_OUT for another purpose and do not apply another 2 8V supply to 2V8_IN than the one from 2V8_OUT The 10 MHz signal from the internal TCXO is available at the REF_O pin with peak to peak amplitude of 1 2V The waveform is illustrated in the oscilloscope screen...

Page 23: ...is not available on all mosaic models It requires the TimedEvent permission to be enabled For correct detection the minimum time between two events on the same EVENTx pin must be at least 5ms and there must be no more than 20 events in any interval of 100ms all EVENTx pins considered If the TimeSync permission is enabled in your mosaic model the event inputs can also be configured as TimeSync sour...

Page 24: ...gnal is briefly driven high during startup of the module for about 1 ms then gets high impedant while the module is starting up It finally gets driven to the intended level low or high depending on the user selected PPS polarity after a few seconds If this start up behavior is undesirable it can be shielded by a buffer or level shifter with an output enable The output enable can be controlled with...

Page 25: ...er powering the module the state of the LEDs is not defined Use a pull down or pull up resistor to force a desired state An example of a circuit with a 10k pull down and a driver is shown below 4 12 Standby It is of course possible to power off the module by switching off the VDD_3V3 and VDD_BAT supplies However this abrupt power interruption could cause data losses when logging on an external SD ...

Page 26: ...andby user command Driving the ONOFF pin low for at least 50ms i e pressing the button for at least 50ms After standby is requested the module terminates all running processes unmounts the external SD card if applicable to avoid any log file corruption and drives the PMIC_ON_REQ pin low to turn off the main power supply VDD_3V3 The module power consumption in standby is 5mW The current state of th...

Page 27: ... See also section 5 4 4 13 RTC The RTC_XTALI and RTC_XTALO pins are reserved to connect an external 32 768 kHz crystal Note that this functionality is currently not available RTC_XTALI should be tied to ground and RTC_XTALO left floating Pin Name Type Level Description Comment RTC_XTALI I Crystal oscillator input terminal Future functionality connect to ground in present version of the module RTC_...

Page 28: ...mmended To provide power to the antenna s the VANT pins are also connected to the 3 3V supply The 2V8_IN and 2V8_OUT pins are connected as no external frequency reference is used see section 4 7 The REF_I and REF_O pins are connected for the same reason 1V8_OUT is connected to SYNC this must always be the case Pin A3 RTC_XTALI needs to be connected to ground All other pins are left unconnected For...

Page 29: ...29 29 mosaic Integration 29 5 1 1 Single Antenna Modules In single antenna mosaic modules the ANT_2 pin V23 must be tied to ground ...

Page 30: ...9A TVS Transient voltage suppression diode SESD0402X1BN 0010 098 or equivalent Note that the combined current drawn by both antennas must not exceed 150mA 5 2 Electrical Recommendations All ground pins must be connected Do not drive a non zero voltage into input pins pins type I in the tables in chapter 4 when the module is not powered or when it is in standby see section 4 12 When pull up down re...

Page 31: ...minals don t need external decoupling 5 4 Power States The module can be in three different states off active or standby When off the module is completely turned off In active state it is operating with all functions active Standby state is similar to off the main difference being in the transition from the active state When going from active to off recent data logged to an external SD card may be...

Page 32: ...ly shall be less than minimum supply voltage 3 135V 0 5A Use a ground plane 5 5 3 Antenna Inputs The antenna input traces shall be routed as a 50 ohm coplanar waveguide with ground as in the picture below It is best to use stitching vias every few mm for good ground coherence The width of the trace to set the impedance to 50 ohm can be calculated with online tools e g https chemandy com calculator...

Page 33: ...n the GNSS antenna is closer than 1 meter from electronics which are not in a shielded box The SDIO RMII and MDIO signals of mosaic can cause harmful radiated interference if not properly routed In designs with a collocated antenna these signals shall preferably be routed in an inner layer of the board shielded by ground planes or a ground copper pour at top and bottom layers connected with stitch...

Page 34: ...nvironment and using ESD safe tools and equipment These tools are typically marked with the following symbol The mosaic module should be stored and handled in the original package preferably or in a conductive foam shorting all pads 6 2 ROHS WEEE NOTICE Septentrio receivers and modules are compliant with the latest WEEE RoHS and REACH directives For more info see www septentrio com en environmenta...

Page 35: ...g 35 6 3 Packaging Mosaic modules are delivered on a tray in a dry pack with 27 modules per tray Package contents 27 mosaic modules 1 humidity indicator 1 desiccator bag Packing list Label Process lot label MSL level label ...

Page 36: ... mosaic variant with hardware revision Quantity number of modules in the bag PN Septentrio Part Number MPN Manufacurer Part Number MPL Manufacturer Product Lot Date Packaging Date 6 3 2 MSL Level Label The labeling gives information about Moisture Sensitivity Level and Floor Life Storage conditions ...

Page 37: ...erability problems during board assembly The cumulative bake time at a temperature greater than 90 C and up to 125 C should not exceed 96 hours Bake temperatures higher than 125 C are not allowed The 27 position tray cannot sustain baking temperature The mosaic modules have to be baked separately from the shipment tray 6 4 1 Note for Small Quantities For small quantities requested for prototype us...

Page 38: ...route them using a plane 6 6 2 Reflow Profile Reflow soldering is the soldering method recommended to assemble mosaic modules The recommended temperature profile is specified with the graphic below Refer also to IPC 7530A Guidelines for Temperature Profiling for Mass Soldering Processes Reflow and Wave The final reflow profile shall be based on leadfree process and depends on parameters such as th...

Page 39: ...ign and thickness must be adjusted to the customer s specific manufacturing processes In any case the stencil thickness shall not be less than 0 1mm 4mil Mount the part with the largest available placement nozzle attached to the center of the shield Use the slowest possible speed of the pick and place machine When implemented on a double sided PCB the mosaic module has to be assembled during the f...

Page 40: ...of 2 54mm with the exception of J500 PPS EVENTS and J501 GP Those headers have a 2mm pitch 7 2 Powering the DevKit There are two ways to power the DevKit 1 From the USB Dev connector J205 This allows powering the board from a PC or from a standard phone charger adapter The supported USB voltage range is 4 5V 5 5V 2 Using the POWER connector J203 The supported voltage range is 5 36V PPS EVENTS POWE...

Page 41: ...g the contribution from the DevKit and the antenna but including a small contribution from the interface board remove the jumper on J200 and connect the two pins to the probes of a multimeter in current sensing mode Measure the current flowing between the two pins and multiply it by 3 3V to obtain the power consumption It is recommended to set the multimeter in high ampere setting to keep the volt...

Page 42: ... and General Purpose Output Pins The POWER LED lights when the DevKit is powered The GPLED and LOGLED are connected to the homonymous pins of the mosaic module See section 4 11 for the pinout and Appendix A for a description of the LED behavior The GPLED2 LED is not available on the DevKit The 3 3V GP1 and GP2 outputs are available on the J501 header 2x8 2mm pitch DIL POWER GPLED LOGLED GP1 GP2 ...

Page 43: ...rough four 6 pin 2 54mm pitch headers as shown below The pinout is compatible with standard FTDI 6 pin SIL connectors To route a COM port to the 6 pin header instead of the BD9 connector a jumper must be placed on J800 COM1 J801 COM2 J804 COM3 and or J805 COM4 Only those COM ports for which the jumper is placed are routed to the 6 pin header The other COM ports are still routed to the DB9 connecto...

Page 44: ...ports 10 100 Base T Ethernet It is not possible to power the DevKit through the Ethernet connector The development kit is compliant with EU EMC standards EN303413 provided the Ethernet interface is disabled with the setEthernetMode user command When the Ethernet interface is enabled harmonics from the RMII interface slightly violate this regulation as they radiate via the 60 pins board to board co...

Page 45: ...module Pressing the LOGGING button drives the LOGBUTTON pin of the mosaic low This can be used to enabled and disable logging as described in section 4 6 The buttons are also connected to J601 and J602 2 pin headers see above picture Connecting the nRST or LOGGING pins of these headers to ground is the same as pressing the respective button 7 12 SD Card Socket The module can log files on the micro...

Page 46: ...a version incorporating mosaic H 410397 including accessories Dimensions 71 x 59 x 12 mm 1 mm Weight 58 g 1 g 8 1 Interfaces 8 1 1 USB This micro B connector is used to access the mosaic go over USB It can also be used to power the mosaic go See also section 8 4 8 1 2 RSV USB This connector is reserved and should not be used 8 1 3 RF_IN1 and RF_IN2 These are the main and auxiliary antenna connecto...

Page 47: ...ted to 3 3V see 4 9 EVENT In 3V3_LVTTL Event timer input Connects to EVENTA of mosaic through a 3V3 to 1V8 level translator See 4 8 8 1 6 4 pin Connector Type GH connector 1 25mm pitch 4 way Mating connector housing GHR 04V S Pin Name Direction Level Description Comment NRST In 3V3_LVTTL Reset input Directly connects to nRST_IN of internal mosaic see 4 1 TXD2 Out 3V3_LVTTL Serial COM2 transmit lin...

Page 48: ...al logging status indicator POWER Red On when mosaic go is powered 8 4 Powering the mosaic go There are two ways to power the mosaic go The nominal input power supply is 5V From the USB connector This allows powering the board from a PC or from a standard phone charger adapter The supported USB voltage range is 4 5V 5 5V Using the VCC pin of the 6 pin connector The supported voltage range is 4 75V...

Page 49: ...ial correction indicator In rover PVT mode this LED reports the number of satellites for which differential corrections have been provided in the last received differential correction message RTCM or CMR LED behaviour Number of satellites with corrections LED is off No differential correction message received blinks fast and continuously 10 times per second 0 blinks once then pauses 1 2 blinks twi...

Page 50: ...e LOGLED reports the SD card mount status and logging activity LED LED Behaviour LOGLED LED is off when the SD card is not present or not mounted LED is on when the SD card is present and mounted Short blinks indicate logging activity ...

Page 51: ...15dB and NRrx is 8 5dB see table in section 4 2 In this case the system noise figure is NFsys 10 log10 102 5 10 108 5 10 1 1015 10 2 95 dB The C N0 in dB Hz of a GNSS signal received at a power P can be computed by C N0 P 10 log10 Tant 290 10NFsys 10 1 228 6 dB where P is the received GNSS signal power including the gain of the antenna passive radiating element in dBW e g 155dBW Tant is the antenn...

Page 52: ...rs These can be implemented on the PCB as indicated in the figure below TVS diode use SESD0402X1BN 0010 098 or equivalent Inductor L select an inductor which is self resonant between 1350 and 1450 MHz with at least 300 mA current rating e g Würth 744786139A Avoid stubs at the RF path The inductors TVS diodes and R1 resistors shall be very close to the RF trace and have short grounding if applicabl...

Page 53: ... main and auxiliary input differences between pre amplification usually relate to differences in cable lengths For example RG58 cable will typically have between 0 5 and 0 8 dB m loss at the GNSS operating frequencies consider 1 6 GHz Therefore RG58 cable length differences beyond 6 m could cause issues In applications with limited asymmetry between both pre amplifications 5 dB it is recommended t...

Page 54: ...ns the C N0 values should reach up to 50 dB Hz for the strong signals on L1 and L5 and up to 45 dB Hz on L2 as illustrated below If the maximum C N0 is lower than expected interference and cross talk from nearby electronics is likely and the source of the problem needs to be identified This is where the RF spectrum monitor built in the GNSS receiver comes in handy The spectrum monitor can be acces...

Page 55: ...band and slightly degrades the L1 C N0 of some GLONASS satellites Try to keep personal computers and other equipment more than 2 meters away from the antenna while assessing electromagnetic compatibility of the integration RxControl also allows to observe the time domain signal This should look like white Gaussian noise as illustrated below ...

Page 56: ...indication of an interfering source at 48 MHz as this maps to the 25th and 26th harmonic of a 48 MHz signal This may correspond to the frequency of a microcontroller in the application Integration cross talk can be solved in a number of ways Shift the clock frequency of the interfering signal to avoid the GNSS bands Use shielding tape with conductive adhesive Shield radiating circuits preferably a...

Page 57: ...1 GND K22 GND K23 GND L1 RTS3 L2 RMII_TXEN L3 GP2 L21 GND L22 GND L23 GND M1 TXD3 M2 RMII_RXER M3 GPLED2 M21 GND M22 GND M23 2V8_IN N1 CTS3 N2 RMII_CRSDV N3 Reserved_NC N21 GND N22 GND N23 2V8_OUT P1 GND P2 GND P3 GND P21 GND P22 GND P23 VANT R1 Reserved_NC R2 RMII_RXD0 R3 GND R21 GND R22 GND R23 VANT T1 Reserved_NC T2 RMII_RXD1 T3 Reserved_NC T21 GND T22 GND T23 GND U1 Reserved_NC U2 GND U3 Reser...

Reviews: