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19
Pinout and I/O Description
19
4.5
Ethernet
The module supports full duplex 10/100 Base-T Ethernet communication. The Ethernet
PHY and magnetics are to be implemented on the host board. Connection with the PHY
is through the RMII interface available on the following pins:
Pin Name
Type
Level
Description
Comment
RMII_CLK
O
3V3_LVTTL
LAN PHY Clock
MDIO
I/O
3V3_LVTTL
LAN PHY control data
MDC
O
3V3_LVTTL
LAN PHY control clock
RMII_RXD1
I, PU
3V3_LVTTL
LAN PHY receive data 1
RMII_RXD0
I, PU
3V3_LVTTL
LAN PHY receive data 0
RMII_CRSDV
I, PU
3V3_LVTTL
LAN PHY CRS
RMII_RXER
I, PU
3V3_LVTTL
LAN PHY RX error
RMII_TXEN
O
3V3_LVTTL
LAN PHY transmit enable
RMII_TXD0
O
3V3_LVTTL
LAN PHY transmit data 0
RMII_TXD1
O
3V3_LVTTL
LAN PHY transmit data 1
nRST_LAN
O
3V3_LVTTL
LAN reset (low to reset the PHY)
When connecting this pin to enable an
Ethernet PHY, add a 10k pull-down.
If Ethernet is not used, all these pins should be left unconnected.
Hostname
: the module hostname is based on the last seven digits of the serial number.
For example, the hostname of the module shown below is
mosaic-X5-3054938
.
4.5.1
Typical Application
An application circuit using the KSZ8041NLI PHY and a Würth 74990111217 RJ45
connector with integrated magnetics is given below. In green, the signals to be connected
to the mosaic pins.
