Section 6 SMT-200 Technical
Io
SENSOR
76
SMT-200 Operations and Technical Manual 2.00/R1
6.5 Power
Supply
The main power supply is shown on sheet 7. of the SMT-200 Schematic.
The 12 V form the battery is fed to U19 and U20, which are ± 15 V and 5 V regulators respectively.
The ± 15 V is used for the analogue circuitry and is switched on or off via O11, pin 19 of the Program
Peripheral Interface (PPI) chip. The PPI is configured to give 8 input and 16 output lines. The 5 V
circuit can be shutdown via O10 which will reset the RS flip-flop built around U22. The signal -
ON/OFF is used to switch the unit on. The signal is normally held high by R32. When the
ENTER/START button is pressed on the front panel this signal will be forced low and will cause the
output of the flip-flop to be latched low. This will turn U20 and thus the 5 v on. The ENTER/START
button will go high once it is released. The state of this line is monitored by I3, pin 2 on the PPI for use
in the keyboard circuit. When connected to the docking station a PC can also turn on the SMT-200 via
the mosfet switch connected to the DTR line.
The circuit to generate the LCD contrast voltage is built around U24, TL497 switching regulator. It is
configured to provide -23 v which is then fed to a variable gain amplifier. The gain is set to less than
unity and can be adjusted via O12 to O15 of the PPI.
The battery voltage is continually monitored by a voltage detector, U21. The output pin (4) of this
device is an open collector transistor which will turn on when the voltage on the threshold pin (3) drops
below 1.15 V. With the values of R37 and R38 selected the signal -LOBATT will go low when the
voltage is less than 10.7 V.
6.6 Address
Decoder
The address decoder shown on sheet 7. of the SMT-200 Schematic.
The SMT-200 hardware is mapped into the PC I/O locations by U1, U3 and U4. The output of U4 (pin
8) is low when there is an I/O read or write to a valid (1B0h to 1BFh) location. This is further decoded
by U1 to generate the enable signals for the various devices.
Data on the PC’s bus is latched into U2 when U4, pin 8 becomes active and a I/O write (IOW) is
issued and latched from the various devices when U4, pin 8 and a I/O read (IOR) is issued.
6.7 Display
The LCD interface is on sheet 7. of the SMT-200 Schematic.
The LCD display connects to JP8. The display module connects more or less directly to the PC bus.
The backlight is switched on or off via Q6 (BS170 Mosfet) controlled by O9 of the PPI. The contrast of
the display is very dependant on the temperature. Temperature is monitored by the internal Smartec
sensor and used to update the contrast using the circuit described in section 5.1.
