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FPGA35S6046/FPGA35S6101 User’s Manual
Table of Contents
CN3: Xilinx JTAG Programming Header
CN8: High Speed Digital I/O Connector
CN10, CN11, CN12, CN13: RS-232/422/485 Transceiver Connectors
CN1(Top) & CN2(Bottom): PCIe Connector
JP4, JP5, JP6: Pull up/Pull down Jumper
JP1: Embedded Programmer Enable
P2: RS-232/422/485 Transceiver Connector
P4: High Speed Digital I/O Connector
CN1(Top) & CN2(Bottom): PCIe Connector
JP4, JP5, JP6: Pull up/Pull down Jumper