Using PEEDI
This feature of PEEDI helps programming FLASH chips which are bigger than the visible external
asynchronous memory space.
COREn_VMEM
Synopsis:
COREn_VMEM = <address>, <length>
Description:
Defines a memory region, which is virtually mapped to large external memory mapped
device.
COREn_VMEM_WINDOW
Synopsis:
COREn_VMEM_WINDOW = <address>, <length>
Description:
Defines a memory window to physically access the external memory mapped device,
t.e. the memory region where the device is mapped into the CPU memory space.
COREn_VMEM_PINS
Synopsis:
COREn_VMEM_PINS = P<A..J><0..15>
Description:
Pxy, where ’x’ is the GPIO port A..J and ’y’ is the bit number 0..15. List of the GPIO
pins connected to the higher external device address lines that are not connected to the
CPU address bus, starting from lowest to highest, separated by comma. The GPIO pins
must belong to the same GPIO port.
Imagining that we want to virtually map on address 0x30000000, an 8MB FLASH that is connected
to the first chip select of the CPU, so physically accessible at 0x20000000 via 1MB window and its
A19, A20 and A21 pins are connected to PF4, PF5 and PF8 CPU pins, the configuration should
look like this:
PEEDI User’s Manual
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