FEDL22620-01
ML22620
RDERR command
・
Command
1
0
1
1
1
0
0
ERSEL
1st byte
The RDERR command read misoperation detection and failure detection status. This command can be input regardless of
the NCR signal status. When reading error information in the second byte after command input, set the SI pin to "L".
If the outputs of misoperation detection and failure detection are selected by OUTSTAT command, and the read data is all
"L" even though STATUS1 or STATUS2 pin is "H", the read data cannot be read normally. Be sure to read it again.
The internal operating states read in the second byte are as follows:
2nd byte
D7
D6
D5
D4
D3
D2
D1
D0
Output data
OSCERR
RSTERR
WDTERR
ROMERR
SPDERR
TSDERR
DCDERR
WCMERR
Misoperation detection and failure detection status are as follows.
Error signal
Description
WCMERR
This bit is set to "1" when an error of the command is detected.
DCDERR
This bit is set to "1" when the disconnection of the speaker connected to the SPP and SPM pins is
detected.
TSDERR
This bit is set to "1" when the LSI temperature becomes 130°C or higher.
SPDERR
This bit is set to "1" when the SPP pin and the SPM pin are short-circuited, or when the SPP pin or
the SPM pin is short-circuited to GND.
ROMERR
This bit is set to 1 when an error is detected in the flash memory.
WDTERR
This bit is set to "1" when the first overflow of the watchdog timer counter occurs.
RSTERR
This bit is set to "1" when the second overflow of the watchdog timer counter occurs.
Alternatively, this bit is set to "1" when the RST counter, which starts operation by any of the error
detections, overflows.
OSCERR
This bit is set to "1" when the clock input from the crystal resonator or ceramic resonator is stopped.
For details on misoperation detection and failure detection, refer to the "Misoperation detection and failure detection
functions" in the "Function description".
For the timing of the RDERR command, refer to the "RDERR command timing" in the timing chart.
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Summary of Contents for LAPIS Semiconductor ML22620
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