FEDL22620-01
ML22620
●
Analog Part Characteristics
SPV
DD
≥DV
DD
=IOV
DD
=2.7 to 5.5V, DGND=SPGND=0V, Ta=-40 to +85°C, Load capacitance of output pin =15pF(max.)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
RC4MHz clock frequency
Frc
Ta=-40 to +70°C
3.89
4.096
4.31
MHz
AIN pin input resistance
R
AIN
Input gain 0dB
10
20
30
kΩ
AIN pin input voltage range
V
AIN
—
—
—
SPV
DD
×2/3
Vp-p
Line amplifier output
resistance1
*1
R
LA1
SPV
DD
= 3.3 to 5.5V
When 1/2SPV
DD
± 1 mA is
applied
—
—
100
Ω
Line amplifier output
resistance2
*1
R
LA2
SPV
DD
= 2.7 to 3.6V
When 1/2SPV
DD
± 1 mA is
applied
—
—
300
Ω
Line amplifier
output-load-resistance
*1
R
LA
For SPGND
10
—
—
kΩ
Line amplifier Out put Voltage
Range
*1
V
AO
No output load
SPV
DD
/6
—
SPV
DD
×5/6
V
SG pin output voltage
V
SG
—
0.95x
SPV
DD
/2
SPV
DD
/2
1.05x
SPV
DD
/2
V
SG pin output resistance
R
SG
—
57
96
135
kΩ
SPP/SPM pins Output-Load
Resistance
R
LSP1
—
6
8
—
Ω
To the SPP and SPM pins
Short circuit detection
R
OCDAB
Class AB speaker amplifier
4.5V
≤SP
VDD
≤5.5V
0.1
—
6
Ω
R
OCDD
Class D speaker amplifier
4.5V
≤SP
VDD
≤5.5V
0.1
—
3
Ω
Speaker amplifier output power
1
P
SPO1
SPV
DD
=5.0V,
f=1kHz R
SPO
=8Ω,
THD=10%
0.8
1
—
W
Speaker amplifier output power
2
P
SPO2
SPV
DD
=3.0V,
f=1kHz R
SPO
=8Ω,
THD=10%
0.1
0.3
—
W
During no-signal SPM-SPP
Output offset voltage
V
OF
AVOL=0dB
8 Ω load
-50
—
50
mV
*1 Applies to the SPP when outputting LINE.
12/115
Summary of Contents for LAPIS Semiconductor ML22620
Page 106: ...FEDL22620 01 ML22620 106 115...