FEDL22620-01
ML22620
■
Pin Description
Pin
Symbol
I/O
Attribute
Description
Initial
value
*1
1,18
DGND
G
-
Digital ground pin.
—
3
TEST1
O
-
Output pin for testing.
Leave open.
Hi-Z
4
CSB
I
Negative
Synchronous serial interface chip select pin.
The SCK and SI inputs are accepted only when this pin is at the "L"
level.
H
5
SCK
I
-
Synchronous serial interface clock input pin.
L
6
SI
I
-
Synchronous serial interface data input pin.
Data is fetched in synchronization with SCK.
L
7
SO
O
-
Synchronous serial interface data output pin.
When the CSB pin is at an "L" level, data is output in synchronization
with SCK.
When the CSB pin is at an "H" level, this pin enters a high-impedance
state.
Hi-Z
9
ERCSB
O
Negative
Serial flash memory interface chip select output pin.
Output the "H" level during non-access and the "L" level during
access.
Setting the EROFF pin to "L" enables output.
H
10
ERSCK
O
-
Serial flash memory interface serial clock output pin.
Setting the EROFF pin to "L" enables output.
L
11
ERSI
I
-
Serial flash memory interface serial data input pin.
Setting the EROFF pin to "L" enables input.
A pull-down resistor is internally connected.
L
12
ERSO
O
-
Serial flash memory interface serial data output pin.
Setting the EROFF pin to "L" enables output.
L
13
EROFF
I
Positive
Pin to disable the serial flash memory interface.
When this bit is set to "L", the serial flash memory interface pin is
enabled. A pull-down resistor is internally connected.
Set this pin to "L" during playback operation using serial flash
memory.
When this pin set to "H", the serial flash memory interface is in a
condition of high-impedance.
Set this bit to "H" for onboard rewriting.
L
*1 Initial value at reset input and power-down. The pin whose IO is "I" indicates a fixed level from outside.
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Summary of Contents for LAPIS Semiconductor ML22620
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