Smart Module Series
SA800U-WF Hardware Design
SA800U-WF_Hardware_Design 70 / 106
CSI3_CLK_P
J1-87
AI
MIPI clock of camera 3 (+)
impedance.
CSI3 can only receive
data of RAW format. It
can be used for
ToF/3D camera
modules but cannot be
used for display.
CSI3_LN0_N
J1-81
AI
MIPI lane 0 data of camera 3 (-)
CSI3_LN0_P
J1-79
AI
MIPI lane 0 data of camera 3 (+)
CSI3_LN1_N
J1-73
AI
MIPI lane 1 data of camera 3 (-)
CSI3_LN1_P
J1-75
AI
MIPI lane 1 data of camera 3 (+)
CAM0_STROBE
J1-122
DO
Strobe of camera 0
1.8 V power domain.
CAM1_STROBE
J1-116
DO
Strobe of camera 1
CAM2_STROBE
J1-118
DO
Strobe of camera 2
CAM0_MCLK
J1-91
DO
Master clock of camera 0
CAM1_MCLK
J1-95
DO
Master clock of camera 1
CAM2_MCLK
J1-99
DO
Master clock of camera 2
CAM3_MCLK
J1-103
DO
Master clock of camera 3
CAM0_RST
J1-100
DO
Reset of camera 0
CAM1_RST
J1-96
DO
Reset of camera 1
CAM2_RST
J1-124
DO
Reset of camera 2
CAM3_RST
J1-126
DO
Reset of camera 3
CAM0_PWDN
J1-114
DO
Power down of camera 0
CAM1_PWDN
J1-120
DO
Power down of camera 1
CAM2_PWDN
J1-106
DO
Power down of camera 2
CAM3_PWDN
J1-112
DO
Power down of camera 3
CAM0_AVDD_EN
J1-102
DO
AVDD enable of camera 0
CAM1_AVDD_EN
J1-98
DO
AVDD enable of camera 1
CAM2_AVDD_EN
J1-104
DO
AVDD enable of camera 2
CAM3_AVDD_EN
J1-108
DO
AVDD enable of camera 3
CAM0_DVDD_EN
J1-132
DO
DVDD enable of camera 0
