Smart Module Series
SA800U-WF Hardware Design
SA800U-WF_Hardware_Design 20 / 106
LDO24A_3V075
J4-8
PO
3.075 V output
Vnom = 3.075 V
I
O
max = 150 mA
Power supply for
DP
’s pull-up
circuits.
Add a 1.0
–4.7 μF
bypass capacitor if
used.
If unused, keep
this pin open.
LDO28A_3V0
J4-10
PO
3.0 V output
Vnom = 3.0 V
I
O
max = 150 mA
Power supply for
VDD of TP.
Add a 1.0
–4.7 μF
bypass capacitor if
used.
If unused, keep
this pin open.
GND
J1-2, J1-7, J1-8, J1-13, J1-14, J1-19, J1-20, J1-25, J1-26, J1-31, J1-32, J1-37,
J1-38, J1-41, J1-44, J1-50, J1-56, J1-59, J1-62, J1-65, J1-68, J1-71, J1-74,
J1-77, J1-80, J1-83, J1-89, J1-93, J1-94, J1-97, J1-101, J1-105, J1-113, J1-119,
J1-125, J1-131, J1-156, J1-157, J1-158, J2-11, J2-12, J2-17, J2-18, J2-23,
J2-24, J2-29, J2-30, J2-35, J2-36, J2-41, J2-42, J2-45, J2-53, J2-98, J2-103,
J2-104, J2-109, J2-110, J2-115, J2-116, J2-121, J2-122, J2-127, J2-155,
J2-158, J2-161, J2-167, J3-1, J3-8, J3-13, J3-21, J3-28, J4-7, J4-12, J4-19,
J4-22, J4-25, J4-28
USB Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics Comment
USB_VBUS
J2-160,
J2-162,
J2-164,
J2-166,
J2-168,
J4-13,
J4-14,
J4-15,
J4-16,
J4-17,
J4-18
PI/
PO
Charging power
input.
Power output for
OTG device.
USB/adaptor
insertion detect.
Vmax = 14 V
Vmin = 4.0 V
Vnom = 5.0 V
USB1_DM
J2-117
AIO
USB1 2.0
differential data
(-)
90 Ω differential
impedance.
USB 2.0 standard
compliant.
USB1_DP
J2-119
AIO
USB1 2.0
differential data
(+)
