Printronix 108525-001, Maintenance Manual

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2-30 P6040/P6080 Principles of Operation
2-6. Logic C3 PCBA
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continued
p. Front Panel Interface
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ENABLE 40104 RESET
40106 SET
When reset, ENABLE (NENABLE at the J3 interface) enables the C3 shift register latch to shift
data on the PDATA line. When set, enables the front panel to shift data over the PDATA line and
disables the C3 driver.
REGSEL 40100 RESET
40102 SET
When set, permits the shifted data to go into the LCD display registers. This is used during the
power-up initialization of the front panel.
NSWITCH
This is an interrupt input to the 68901 on GPIB3.
q. Bus Structure
The Motorola MC68000 microprocessor unit (MPU) was chosen for the processor for the logic
C3. This processor has 32-bit internal data and address registers with 16-bit external data bus
(D0-D15) and 23-bit external address bus (A1-A23). There are three address busses associated
with the logic C3 card. Two address busses are used for microprocessor interfacing and latch setĆ
ting, while the other address bus is used for access of the DRAMS on the C3 card. The 68B44 direct
memory access (DMA) device resides on the upper data bus (D8-D15), while the 68901 multi-
function peripheral (MFP) resides on the lower data bus (D0-D7). The 68901 MFP must reside
on the lower data bus to provide vectored interrupt processing capabilities.
r. Reset Control
Not master clear (NMC-low true) can be asserted from three sources. The three sources are:
power-on reset, hammer master clear (HMC), (a signal from the power supply card), and the
68000 reset instruction that drives the NMC line low under software control.
The power-on reset circuit, found on the page of the schematic with the CPU, has a reset time
about 350ms. The P6000 Series power supply stab5V within 70ms after power-on. The
68000 requires that the reset line held low at least 170ms after +5V is stable.
The HMC signal is low for about 70ms after power-up, and does not effect the operation of the
circuit except when the card is not plugged into the printer (bench test). During bench testing the
HMC line must be pulled low for the NMC signal to become inactive, allowing the 68000 MPU to
run.
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