Printronix 108525-001, Maintenance Manual

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2-26 P6040/P6080 Principles of Operation
2-6. Logic C3 PCBA
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continued
i. Parallel Interfaces
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The parallel port interrupt is input to the 68901 at GPIB4. DMA End (DEND) causes ICBUSY to
go active, preventing further host data transfers.
The DMA will only interrupt the processor when the byte count is zero, provided that the DEND/
IRQ enable bit is set (Interrupt Control Register Bit 0).
ICBUSY, the busy signal at the interface, has several sources. When fast busy is not enabled, the
interface will go busy (ICBUSY asserted) on the reception of a DMA END interrupt to the 68901.
To clear the busy set by an interrupt, the software must pulse IBSYRST for a minimum of 25 ns.
Software, through the busy control port, can create an ICBUSY at the interface at any time. When
ONL is not active, the printer interface sets ICBUSY.
If the fast busy function is enabled, by setting, FBSYEN, the printer asserts ICBUSY as each charĆ
acter is clocked into the printer. ICBUSY is reset automatically by hardware once the character is
into memory.
1. Dataproducts Format
Signals received in the Dataproducts format include IBD1-8, PI and IDSTB. Signals sent
to the host from the logic C3 include IDRQ, IONLINE and ICRDY. The polarity of the
input strobe, IDSTB, is selectable by hardware and readable by software. The polarity inĆ
version signal name is IDS. If IDS is active (low) software can change the polarity of the
output signals by asserting OPS (output polarity select). The interface follows the
Dataproducts protocols defined in 900197. Note that the activation of the Dataproducts
interface requires that the proper cable kits are installed (see 108037 and 108083).
2. Centronics Format
Signals received in the Centronics format include: IBD1-8, PI and ICSTB. Signals sent to
the host from the logic C3 include IACK, ICPE and ICBUSY. IACK is a 4 m s (typ.) pulse
generated when the DMA completes the transfer of each character. For cabling requireĆ
ments see 108037 and 108083.
j. Mechanism Interface
The J2 connector is the connector through which the logic C3 controls the printer mechanism. The
Circuits controlled through this connector include the hammer driver PCBA and the shuttle, ribĆ
bon, and paper drive systems on the power supply PCBA.
The hammer driver PCBA control signals are optically isolated from the backplane (mechanism
interface) to provide noise immunity. The optical isolators require high current drivers. A7406
gate drives the COM line. Hammer shift clock NHSC is driven by a 74S32, hammer clock (NHCK)
by a 74LS125 buffer with a 330 pull up, and the hammer reset (HRS) uses a 7400 nand gate. The
high sink current requirements of the hammer driver PCBA makes these selections necessary.
Some of the power supply PCBA signals are optically isolated, and most have a high current reĆ
quirement. 7406 gates drive paper feed enable (NPDE), paper feed (PF1, PF2), and shuttle drive
(NSD). An LS gate drives the 2 MHz signal which is used to time the disengagement of the shuttle
motor start circuitry.
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