PRA-BD11
91
5
6
7
8
5
6
7
8
C
D
F
A
B
E
No.
Pin Name
I/O
Pin Function
181 23_VFLB
I
Validity Flag input for CH3/4
182 27M_GEN
I
27MHz system clock input
183
184
185 14_SCK
I
Audio clock input for AES/EBU
186
187 23_VFLA
I
Validity Flag input for CH1/2
188 23_SAFB
I
Start of audio frame input for CH3/4
189 23_SAFA
I
Start of audio frame input for CH1/2
190
191 23_RESET#
O
Reset output
192 14_M3
O
Audio output form setting
193 14_M2
O
Audio output form setting
194 14_M1
O
Audio output form setting
195 14_M0
O
Audio output form setting
196
197
198
199 14_RESET
O
Reset output
200 14_ERF
I
Error flag Indicator
201 14_CBL
I
Channel Status Block Indicator
202 14_U
I
-
203 14_VERF
I
Va Error flag Indicator(Logical OR)
204 14_SDATA
I
Data input for AES/EBU
205 14_FSYNC
I
LR clock input for AES/EBU
206 14_SCK
I
Serial clock input for AES/EBU
207 (TCK)
208
GND
−
Digital GND
Vcco
−
I/O power supply (3.3V)
Vccint
−
Core power supply (2.5V)
GND
−
Digital GND
Vccint
−
Core power supply (2.5V)
Vcco
−
I/O power supply (3.3V)
GND
−
Digital GND
Vcco
−
I/O power supply (3.3V)
I
JTAG TCK
Summary of Contents for PRA-BD11
Page 19: ...PRA BD11 19 5 6 7 8 5 6 7 8 C D F A B E A 3 4 ...
Page 21: ...PRA BD11 21 5 6 7 8 5 6 7 8 C D F A B E ...
Page 23: ...PRA BD11 23 5 6 7 8 5 6 7 8 C D F A B E B 1 2 2 2 B 2 2 B 2 2 B 2 2 B 2 2 B 2 2 B 2 2 B 2 2 B ...
Page 25: ...PRA BD11 25 5 6 7 8 5 6 7 8 C D F A B E B 2 2 1 2 B 1 2 B 1 2 B 1 2 B ...