PRA-BD11
84
1
2
3
4
1
2
3
4
C
D
F
A
B
E
51
Vddio
-
+3.3V power supply pins for device I/O.
52 N.C.
-
Reserve
53
WCOUT
O
48kHz word clock output
54 AOUTB
O
Audio data output
55 AOUTA
O
56 DOUT9
O
CCIR656 data output
57 DOUT8
O
58 GND
-
Device
ground.
59 DOUT7
O
60 DOUT6
O
61 DOUT5
O
62
DOUT4
O
CCIR656 data output
63 DOUT3
O
64 DOUT2
O
65 DOUT1
O
66 DOUT0
O
67
Vddio
-
+3.3V power supply pins for device I/O.
Video and Audio clock signal
68
LOCK
O
L: un lock
H: lock
69 N.C.
-
Reserve
70 BUFERR
O
Reserve
71 GND
-
Device
ground.
72 DATA7
I/O
73
DATA6
I/O
Host Interface data bus.
74 DATA5
I/O
75
TEST
-
Connect to ground.
76
Vddio
-
+3.3V power supply pins for device I/O.
77 DATA4
I/O
78 DATA3
I/O
79
DATA2
I/O
Host interface data input and output bus.
80 DATA1
I/O
81 DATA0
I/O
82 GND
-
Device
ground.
83
RE#
I
Read enable for Host Interface (Active Low)
84
WE#
I
Read enable for Host Interface (Active Low)
85
CS#
I
Chip select for Host Interface. (Active Low)
86 ADDR3
I
87 ADDR2
I
Host interface address bus.
88 ADDR1
I
89 ADDR0
I
90
Vddint
-
+3.3V power supply pins for core logic.
91 ANCI
I
Reserve
TRS Selection.
92
TRS
I
L: nvalid (default)
H: Effective
EDH Insert Selection.
93
EDH_INS
I
L: Invalid (default)
H: Effective
Audio mute.
94 MUTE
I
H: mute
95 AM2
I
Audio mode format.
96 AM1
I
(default) AM [2:0] =000
97 AM0
I
98 GND
-
Device
ground.
99
ACLK
I
6.144MHz Audio clock input.
100 GND
-
Device
ground.
No.
I/O
SYMBOL
DESCRIPTION
Summary of Contents for PRA-BD11
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