Phytec phyCORE-PXA270, Hardware Manual

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GPIO Expansion Interface
18 GPIO Expansion Board Interface
The Carrier Board also provides a socket for standardized PHYTEC
Expansion Boards. All signals except the data, address and control bus
of the phyCORE-PXA270 extend from phyCORE connector X18 to
the expansion connector X17 in a strict 1:1 arrangement. The data,
address and control bus is buffered on the Carrier Board over line
driver circuits before being routed to X17. The Ethernet signals do not
extend to the expansion connector.
Similar to the numbering scheme of the phyCORE connector, the
expansion connector also uses a two-dimensional matrix.
Please refer to the following figure for the arrangement of the number
matrix for the expansion connector:
B
A D
C
8 0
1
8 0
1
Figure 40: GPIO Expansion Bus Numbering Scheme
In the current version of the address decoder there is no memory area
provided for the expansion card receptacle, because all /CS signals of
the PXA270 are already used for other functions. The following tables
give the signal assignments for the signals of the GPIO expansion bus
connector X17. Signals that are in bold are buffered on the Carrier
Board.
©
PHYTEC Meßtechnik GmbH 2006 L-668e_1
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