Memory
Configuration
©
PHYTEC Meßtechnik GmbH 2006 L-668e_1
41
Control register 5 displays the CF card signals /VS1, /VS2, /BVD1
and /BVD2. /VS1 and /VS2 should be read in order to set the correct
CF card supply voltage in CF card control register 4.
REG
ADDR
D7
D3
D2
D1
D0
CF5
0x3000100A
Res
/VS2 /VS1 /BVD2 /BVD1
RW
R/W=0
R R R
R
Signal
Name
x/CF_VS2 x/CF_VS1 x/CF_BVD2 x/CF_BVD1
Table 33:
CF Card Control Register 5
/BVD1
Returns the CF card /BVD1 signal.
/BVD2
Returns the CF card /BVD2 signal.
/VS1
Returns the CF card /VS1 signal.
/VS2
Returns the CF card /VS2 signal.
The CF card CD signals can be read via control register 6. If a CR
card is inserted correctly in the socket both signals should read back
the value "0".
REG
ADDR
D7
D3
D2
D1
D0
CF6
0x3000100C
Res
WP
Res
/CD2 /CD1
RW
R/W=0 R/W=0 R/W=0
R R
Signal
Name
x/CF_CD2 x/CF_CD1
Table 34:
CF Card Control Register 6
/CD1
Returns the Card Detect1 signal, active low.
/CD2
Returns the Card Detect2 signal, active low.
Summary of Contents for phyCORE-PXA270
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