Hardware overview
19
Model 3096RC T-DAC Getting Started Guide
1 • Introduction
LAN
The 10/100-Mbps Ethernet LAN port is presented on an RJ-45 connector with an auto-sensing/full-duplex
10Base-T or 100Base-T interface. Also included are:
•
100Base-TX half-/full-duplex operation (100 + 100)
•
10Base-T half-/full-duplex operation (10 + 10)
•
Auto detection and fallback
•
10/100 Mbps link and status indicators
RS-232 control port
The RS-232 port provides for initial configuration of the Model 3096RC. The RS-232 port supports:
•
Asynchronous data rates of 19.2 kbps, 8 data bits, no parity, 1 stop bit.
•
An RJ-45 connector with EIA-561 pinouts
•
A management interface that supports VT-100 terminals
•
Hardware flow control (RTS and CTS)
Power system
The 3096RC obtains power from the CPCI chassis via PCMG 2.11 47-pin power connectors on the front and
rear blade. Total power consumption is a maximum of 43 Watts, provided by modular power supplies installed
in the CPCI chassis.
Central processing unit
The 3096RC employs an Intel i960VH RISC processor operating at 100 MHz/100 Mips. The CPU controls
the memory, front/back-panel and management interface for G.SHDSL port/WAN time slot mapping, local
switching, loopback and the management system. The memory holds:
•
4 MB Flash ROM
•
8 MB EDO DRAM
G.SHDSL ports
The 16 G.SHDSL ports operate at data-rates up to 4.6 Mbps and are accessible via the RJ-21X 50-pin Telco
connector. Each port uses one twisted-pair (2-wires) for full-duplex communication. The G.SHDSL ports can
be concentrated into TDM data output on the WAN ports. Other features include:
•
Line encoding defined by G.SHDSL
•
“Plug-and-Play” automatic configuration between the multiplexer and the CPE modems
•
Built-in surge protection
•
Configuration parameters and line status indicators accessible to upper-level utility or application software
System timing
The G.SHDSL T-DAC's system timing may be derived from an internal clock from an on-board chip, a CPE
G.SHDSL modem, a network clock from one of the T1/E1 WAN ports, or an external 64-kHz BITS (building
integrated timing supply) reference clock.
