12-81
Num-
ber
Name
Boolean
Operand
Description
Steps
Data conversion instructions
F70
P70
Block check
code
calculation
BCC
PBCC
S1, S2, S3,
D
Creates the code for checking the data specified by
“S2” and “S3” and stores it in “D”.
The calculation method is specified by “S1”.
9
F71
P71
Hexadecimal
data
→
ASCII
code
HEXA
PHEXA
S1, S2, D
Converts the hexadecimal data specified by “S1”
and “S2” to ASCII code and stores it in “D”.
Example: HABCD
→
H 42 41 44 43
B A D C
7
F72
P72
ASCII code
→
Hexadeci-
mal data
AHEX
PAHEX
S1, S2, D
Converts the ASCII code specified by “S1” and
“S2” to hexadecimal data and stores it in “D”.
Example: H 44 43 42 41
→
HCDAB
D C B A
7
F73
P73
4-digit BCD
data
→
ASCII
code
BCDA
PBCDA
S1, S2, D
Converts the four digits of BCD data specified by
“S1” and “S2” to ASCII code and stores it in “D”.
Example: H1234
→
H 32 31 34 33
2 1 4 3
7
F74
P74
ASCII code
→
4-digit
BCD data
ABCD
PABCD
S1, S2, D
Converts the ASCII code specified by “S1” and
“S2” to four digits of BCD data and stores it in “D”.
Example: H 34 33 32 31
→
H3412
4 3 2 1
9
F75
P75
16-bit binary
data
→
ASCII
code
BINA
PBINA
S1, S2, D
Converts the 16 bits of binary data specified by
“S1” to ASCII code and stores it in “D” (area of “S2”
bytes).
Example: K-100
→
H 30 30 31 2D 20 20
0 0 1 -
7
F76
P76
ASCII code
→
16-bit
binary data
ABIN
PABIN
S1, S2, D
Converts the ASCII code specified by “S1” and
“S2” to 16 bits of binary data and stores it in “D”.
Example: H 30 30 31 2D 20 20
→
K-100
0 0 1 -
7
F77
P77
32-bit binary
data
→
ASCII
code
DBIA
PDBIA
S1, S2, D
Converts the 32 bits of binary data (S1+1, S1) to
ASCII code and stores it in D (area of “S2” bytes).
11
Summary of Contents for FP E Series
Page 1: ......
Page 16: ......
Page 17: ...Chapter 1 Functions and Restrictions of the Unit ...
Page 28: ...1 12 ...
Page 29: ...Chapter 2 Specifications and Functions of the Unit ...
Page 37: ...2 9 Circuit diagram C32 Y0 Y1 Y3 Y4 C28 Y0 Y1 Y3 Y4 Y2 Y5 to YF Y2 Y5 to YB ...
Page 48: ...2 20 ...
Page 49: ...Chapter 3 Expansion ...
Page 56: ...3 8 Terminal layout diagram Note The numbers in the connector are for the first expansion ...
Page 61: ...Chapter 4 I O Allocation ...
Page 66: ...4 6 ...
Page 67: ...Chapter 5 Installation and Wiring ...
Page 90: ...5 24 ...
Page 91: ...Chapter 6 High speed counter Pulse Output and PWM Output functions ...
Page 116: ...6 26 ...
Page 121: ...6 31 ...
Page 125: ...6 35 Pulse output diagram ...
Page 131: ...6 41 ...
Page 139: ...6 49 ...
Page 141: ...6 51 ...
Page 144: ...6 54 Program Continued on the next page ...
Page 145: ...6 55 ...
Page 147: ...6 57 Program ...
Page 151: ...Chapter 7 Communication Cassette ...
Page 210: ...7 60 The values of DT50 and DT51 are written in DT0 and 1 of PLC ...
Page 238: ...7 88 ...
Page 239: ...Chapter 8 Self Diagnostic and Troubleshooting ...
Page 247: ......
Page 248: ......
Page 249: ...Chapter 9 Precautions During Programming ...
Page 260: ...9 12 Example 2 Using the CT instruction between JP and LBL instructions ...
Page 268: ...9 20 ...
Page 269: ...Chapter10 Specifications ...
Page 286: ......
Page 287: ...Chapter 11 Dimensions ...
Page 290: ...11 4 11 1 3 Expansion Unit FPG XY64D2T FPG XY64D2P FPG EM1 ...
Page 293: ...Chapter 12 Appendix ...
Page 297: ...12 5 ...
Page 437: ...12 145 12 7 ASCII Codes ...
Page 439: ......
Page 440: ......