12-99
Num-
ber
Name
Boolean
Operand
Description
Steps
BIN arithmetic instruction
F160
P160
Double word
(32-bit) data
square root
DSQR
PDSQR
S, D
√
(S)
→
(D)
7
Special instructions (High-speed counter instructions)
F0
High-speed
counter and
Pulse output
controls
MV
S, DT9052
Performs high-speed counter and Pulse output
controls according to the control code specified by
“S”. The control code is stored in DT9052.
5
S, DT9044
Transfers (S+1, S) to high-speed counter and
Pulse output elapsed value area (DT9045,
DT9044).
7
F1
Change and
read of the
elapsed value
of high-speed
counter and
Pulse output
DMV
DT9044, D
Transfers value in high-speed counter and Pulse
output elapsed value area (DT9045, DT9044) to
(D+1, D).
7
F162
High-speed
counter output
set
HC0S
S, Yn
The specified external output relay (Yn) turns on
when the elapsed value of the high-speed counter
agrees with the specified target value (S+1, S).
7
F163
High-speed
counter output
reset
HC0R
S, Yn
The specified external output relay (Yn) turns off
when the elapsed value of the high-speed counter
agrees with the specified target value (S+1, S).
7
F164
Speed control
(Pulse output
and pattern
output con-
trols) (See
below.)
SPD0
S
Controls conditions of outputs according to the
elapsed value of the high-speed counter. Two
types of output control available:
- Pulse output control
- Pattern output control
3
F165
Cam control
CAM0
S
Controls cam operation (on/off patterns of each
cam output) according to the elapsed value of the
high-speed counter.
3
Pulse output specifications for FP-M/FP1
Item
FP1 C14/C16, FP-M C16T
FP1 C24/C40
FP1 C56/C72
FP-M C20T/C20R/C32T
Pulse output terminal
Y7
Y7
Y6 and Y7 (selectable)
Pulse frequency
1440 Hz to 5 kHz/720 Hz to 5 kHz/360 Hz to 5kHz/180 Hz to 5 kHz/90 Hz to 5 kHz/45
Hz to 5 kHz (Switches between 6 ranges)
Internal connection
between pulse output
and counter input
Not possible
Not possible
Possible
Switching of the pulse frequency range is supported by CPU Ver. 2.7 or later.
In versions prior to CPU Ver. 2.7, the range is fixed at 360 Hz to 5 kHz.
In Ver. 2.7 or later but prior to CPU Ver. 2.9, switching is possible among 4 ranges (360 Hz to 5 kHz/180
Hz to 5 kHz/90 Hz to 5 kHz/45 Hz to 5 kHz).
In CPU Ver. 2.9 and later versions, switching is possible among 6 ranges.
Summary of Contents for FP E Series
Page 1: ......
Page 16: ......
Page 17: ...Chapter 1 Functions and Restrictions of the Unit ...
Page 28: ...1 12 ...
Page 29: ...Chapter 2 Specifications and Functions of the Unit ...
Page 37: ...2 9 Circuit diagram C32 Y0 Y1 Y3 Y4 C28 Y0 Y1 Y3 Y4 Y2 Y5 to YF Y2 Y5 to YB ...
Page 48: ...2 20 ...
Page 49: ...Chapter 3 Expansion ...
Page 56: ...3 8 Terminal layout diagram Note The numbers in the connector are for the first expansion ...
Page 61: ...Chapter 4 I O Allocation ...
Page 66: ...4 6 ...
Page 67: ...Chapter 5 Installation and Wiring ...
Page 90: ...5 24 ...
Page 91: ...Chapter 6 High speed counter Pulse Output and PWM Output functions ...
Page 116: ...6 26 ...
Page 121: ...6 31 ...
Page 125: ...6 35 Pulse output diagram ...
Page 131: ...6 41 ...
Page 139: ...6 49 ...
Page 141: ...6 51 ...
Page 144: ...6 54 Program Continued on the next page ...
Page 145: ...6 55 ...
Page 147: ...6 57 Program ...
Page 151: ...Chapter 7 Communication Cassette ...
Page 210: ...7 60 The values of DT50 and DT51 are written in DT0 and 1 of PLC ...
Page 238: ...7 88 ...
Page 239: ...Chapter 8 Self Diagnostic and Troubleshooting ...
Page 247: ......
Page 248: ......
Page 249: ...Chapter 9 Precautions During Programming ...
Page 260: ...9 12 Example 2 Using the CT instruction between JP and LBL instructions ...
Page 268: ...9 20 ...
Page 269: ...Chapter10 Specifications ...
Page 286: ......
Page 287: ...Chapter 11 Dimensions ...
Page 290: ...11 4 11 1 3 Expansion Unit FPG XY64D2T FPG XY64D2P FPG EM1 ...
Page 293: ...Chapter 12 Appendix ...
Page 297: ...12 5 ...
Page 437: ...12 145 12 7 ASCII Codes ...
Page 439: ......
Page 440: ......