AO SERIES | INSTRUCTIONS MANUAL
12
following schemes can be chosen (Figure 5):
Figure 5: Two possible wiring configurations for the optoisolated output.
The first two configurations refers to non opto-isolated digital inputs, the other two to opto-isolated digital inputs.
The first configuration uses a pull-up resistor to obtain an “active-low” output signal; in
the second configuration the pull-down resistor allows the generation of a non-inverting
output signal.
The electrical specification of the optoisolator are listed in the following table:
Specification
Test condition
Value
Unit
Collector-emitter voltage (V
CEO
)
70 (max)
V
Emitter-collector voltage (V
CEO
)
7 (max)
V
Collector current (I
C
)
50
mA
Collector peak current (I
CP
)
t
p
/T = 0.5, t
p
≤ 10 ms
100
mA
Collector dark current (I
C,DARK
)
V
CE
= 20 V, I
F
= 0 A
100
nA
Collector emitter saturation voltage
I
F
= 10 mA, I
C
= 1 mA
0.3
V
+V
+V
0
GND
GND
Inverting
OPTO-ISOLATED OUTPUT
LOGIC DIGITAL INPUT
+V
+V
0
GND
GND
Non-Inverting
OPTO-ISOLATED OUTPUT
LOGIC DIGITAL INPUT
+V
GND
OPTO-ISOLATED OUTPUT
DEVICE OPTO-ISOLATED INPUT
+V
0
Inverting
+V
GND
OPTO-ISOLATED OUTPUT
DEVICE OPTO-ISOLATED INPUT
+V
0
Non-Inverting