Omron SYSMAC C20K User Manual Download

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Cat. No. W146-E1-5

Programmable Controllers

SYSMAC

C20K/C28K/C40K/C60K

Summary of Contents for SYSMAC C20K

Page 1: ...Cat No W146 E1 5 Programmable Controllers SYSMAC C20K C28K C40K C60K ...

Page 2: ...K type Programmable Controllers OPERATION MANUAL Revised July 1999 ...

Page 3: ...iv ...

Page 4: ...ans word and is abbreviated Wd in documentation in this sense The abbreviation PC means Programmable Controller and is not used as an abbreviation for any thing else Visual Aids The following headings appear in the left column of the manual to help you locate different types of information Note Indicates information of particular interest for efficient and convenient operation of the product 1 2 3...

Page 5: ...vi ...

Page 6: ...1 Introduction 2 2 Indicators 2 3 PC Configuration SECTION 3 Memory Areas 3 1 Introduction 3 2 Data Area Structure 3 3 Internal Relay IR Area 3 4 Special Relay SR Area 3 5 Data Memory DM Area 3 6 Holding Relay HR Area 3 7 Timer Counter TC Area 3 8 Temporary Relay TR Area SECTION 4 Writing and Inputting the Program 4 1 Introduction 4 2 Instruction Terminology 4 3 The Ladder Diagram 4 4 The Programm...

Page 7: ...Special Instructions SECTION 6 Program Execution Timing 6 1 Introduction 6 2 Cycle Time 6 3 Calculating Cycle Time 6 4 Instruction Execution Times 6 5 I O Response Time SECTION 7 Program Debugging and Execution 7 1 Introduction 7 2 Debugging 7 3 Monitoring Operation and Modifying Data 7 4 Program Backup and Restore Operations SECTION 8 Troubleshooting 8 1 Introduction 8 2 Reading and Clearing Erro...

Page 8: ...of other manuals available to use with this manual for special PC applications are also provided Section 2 Hardware Considerations explains basic aspects of the overall PC configuration and de scribes the indicators that are referred to in other sections of this manual Section 3 Memory Areas takes a look at the way memory is divided and allocated and explains the information provided there to aid ...

Page 9: ...ntained in this section is important for the safe and reliable application of Programmable Control lers You must read this section and understand the information contained before attempting to set up or operate a PC system 1 Intended Audience 2 General Precautions 3 Safety Precautions 4 Operating Environment Precautions 5 Application Precautions ...

Page 10: ...ith double safety mechanisms This manual provides information for programming and operating the Unit Be sure to read this manual before attempting to use the Unit and keep this manual close at hand for reference during operation WARNING It is extremely important that a PC and all PC Units be used for the specified purpose and under the specified conditions especially in applications that can direc...

Page 11: ...s may result in electric shock Always turn OFF the power supply to the PC before attempting any of the fol lowing Not turning OFF the power supply may result in malfunction or electric shock Mounting or dismounting I O Units CPU Units Memory Cassettes or any other Units Assembling the Units Setting DIP switches or rotary switches Connecting cables or wiring the system Connecting or disconnecting t...

Page 12: ...rminal blocks Memory Units expansion cables and other items with locking devices are properly locked into place Improper locking may result in malfunction Check the user program for proper execution before actually running it on the Unit Not checking the program may result in an unexpected operation Confirm that no adverse effect will occur in the system before attempting any of the following Not ...

Page 13: ... SECTION 1 Background 1 1 Introduction 1 2 Relay Circuits The Roots of PC Logic 1 3 PC Terminology 1 4 OMRON Product Terminology 1 5 Overview of PC Operation 1 6 Peripheral Devices 1 7 Available Manuals ...

Page 14: ...ired i e How does the PC know when to activate each pusher Much more complicated operations however are also possible The problem is how to get the desired control signals from available inputs at appropriate times Desired control sequences are input to the K type PCs using a form of PC logic called ladder diagram programming This manual is written to explain ladder diagram programming and to prep...

Page 15: ...re allocated to output points on Units through which output signals are sent to output devices i e an out put bit is turned ON to send a signal to an output device through an output point The CPU periodically turns output points ON and OFF according to the status of the output bits These terms are used when describing different aspects of PC operation When programming one is concerned with what in...

Page 16: ...ion Section 3 Memory Areas 4 Using relay ladder symbols write a program that represents the se quence of required operations and their inter relationships Be sure to also program appropriate responses for all possible emergency situ ations Section 4 Writing and Inputting the Program Section 5 Instruc tion Set and Section 6 Program Execution Timing 5 Input the program and all required operating par...

Page 17: ...e entire Control System has been designed the task of program ming debugging and operation as described in the remaining sections of this manual can begin 1 6 Peripheral Devices The following peripheral devices can be used in programming either to input debug monitor the PC program or to interface the PC to external devices to output the program or memory area data Model numbers for all devices li...

Page 18: ...ed above the Printer Interface Unit can be mounted to the PC s CPU to interface a printer or X Y plotter to print out pro grams in either mnemonic or ladder diagram form 1 7 Available Manuals The following table lists other manuals that may be required to program and or operate the K type PCs Operation Manuals and or Operation Guides are also provided with individual Units and are required for wir...

Page 19: ...7 SECTION 2 Hardware Considerations 2 1 Introduction 2 2 Indicators 2 3 PC Configuration ...

Page 20: ...cribed in the following table Indicator Function POWER Lights when power is supplied to the CPU RUN Lights when the CPU is operating normally ERR Lights when an error is discovered in system error diagnosis operations When this indicator lights the RUN indicator will go off CPU operation will be stopped and all outputs from the PC will be turned OFF ALARM Lights when an error is discovered in syst...

Page 21: ... Battery Alarm Flag 3 4 2 Cycle Time Error Flag 3 4 3 High speed Drum Counter Reset 3 4 4 Clock Pulse Bits 3 4 5 Error Flag ER 3 4 6 Step Flag 3 4 7 Always OFF Always ON Flags 3 4 8 First Cycle Flag 3 4 9 Arithmetic Flags 3 5 Data Memory DM Area 3 6 Holding Relay HR Area 3 7 Timer Counter TC Area 3 8 Temporary Relay TR Area ...

Page 22: ...UM UM 1 194 words Contains the program executed by the CPU When some bits and words in certain data areas are not used for their in tended purpose they can be used in programming as required to control other bits Words and bits available for use in this fashion are called work bits and work words Most but not all unused bits can be used as work bits Those that can be are specified by area in the r...

Page 23: ...signate an individual bit within a DM word Data in the IR SR and HR areas is accessible either by bit or by word depending on the instruction in which the data is being used To designate one of these areas by word all that is necessary is the acronym if required and the one or two digit word address To designate an area by bit the word address is combined with the bit number as a single three or f...

Page 24: ...is is not the same numeric value as the hexadecimal equivalent of 0101011101010111 which would be 5 757 hexadecimal or 22 359 in deci mal 163 x 5 162 x 7 16 x 5 7 Because the numeric equivalent of each four BCD binary bits must be equivalent to a decimal value any four bit combination numerically greater then 9 cannot be used e g 1011 is not allowed because it is numerically equivalent to 11 which...

Page 25: ...numbered 00 through 09 The remaining words 10 through 18 are to be used for work bits Note that with word 18 only the bits 00 through 07 are available for work bits although some of the remaining bits are required for special purposes when RDM is used The actual number of bits that can be used as I O bits is determined by the model of the CPU and the PC configuration There are different models of ...

Page 26: ...2 13 14 15 Word 00 00 01 02 03 04 05 06 07 Word 02 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word 01 00 01 02 03 04 05 06 07 Word 03 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word 00 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word 02 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word 01 00 01 02 03 04 05 06 07 Word 03 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Model Input b...

Page 27: ...0 11 12 13 14 15 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00 01 02 03 04 05 06 07 Word n 2 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00 01 02 03 04 05 06 07 Word n 3 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word n 2 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 00 01 02 03 04 05 06...

Page 28: ...he number of Units of that size to be used as either the CPU or Expansion I O Unit any one of the Units can be the CPU Unit This table does not include the C4P or C16P Expansion I O Units the Analog Timer Unit or the I O Link Unit which can be used for greater system versatility or special applications Refer to the remaining tables in this section for other combinations I O points Count as 2 each ...

Page 29: ...2 meters The tables also show which words will be input words and which words will be output words All of these are determined by the position of the Unit in the configuration except for the C4P and C16P Expansion I O Units in which case the model of the Unit determines whether the words are input or output The symbols used in the table represent the following C20K C28K Input Output C40P C60P Inpu...

Page 30: ... Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C40P C60P Input Output Input Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4...

Page 31: ...t Input Output C40P C60P Input Output Input Output C40P C60P Input Output Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output IR 00 IR 01 IR 02 IR 03 IR 04 IR 05 IR 06 IR 07 IR 08 IR 09 Inte...

Page 32: ...Input Output Input Output C20P C28P TU LU Input Output C40P C60P Input Output Input Output C20P C28P TU LU Input Output C20P C28P TU LU Input Output C40P C60P Input Output Input Output C20P C28P TU LU Input Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output C4K C16P In Output IR 00 IR 01 IR 02 IR 03 IR 04 IR 0...

Page 33: ...le flag 19 00 0 1 second Clock Pulse 01 0 2 second Clock Pulse 02 1 second Clock Pulse 03 Error ER flag 04 Carry CY flag 05 Greater Than GR flag 06 Equals EQ flag 07 Less Than LE flag 3 4 1 Battery Alarm Flag SR bit 1808 turns ON if the voltage of the CPU backup battery drops A volt age drop can be indicated by connecting the output of this bit to an external indicating device such as a LED This b...

Page 34: ... ER flag is ON the cur rent instruction is not executed 3 4 6 Step Flag SR bit 1811 turns ON for one cycle when single step execution is started with the STEP instruction 3 4 7 Always OFF Always ON Flags SR bits 1812 and 1814 are always OFF and 1813 is always ON By connect ing these bits to external indicating devices such as a LED they can be used to monitor the PC s operating status 3 4 8 First ...

Page 35: ...UM COUNTER is used the DM area words 00 to 31 are used as the area where the upper and lower limits of the counter are preset and as such these words cannot be used for any other purposes When the HDM HIGH SPEED DRUM COUNTER is used the DM area words 32 to 63 are used as the area where the upper and lower limits of the counter are preset and as such these words cannot be used for any other purpose...

Page 36: ...rs are reset when PC operation is begun and when reset in interlocked program sections Refer to 5 7 INTERLOCK AND INTER LOCK CLEAR IL 02 and ILC 03 for details on timer and counter operation in interlocked program sections The PVs of counters are not reset at these times Note that in programming TIM 00 is used to designate three things the TIMER instruction defined with TC number 00 the completion...

Page 37: ...oard 4 4 2 PC Modes 4 5 Preparation for Operation 4 5 1 Entering the Password 4 5 2 Clearing Memory 4 5 3 Clearing Error Messages 4 6 Inputting Modifying and Checking the Program 4 6 1 Setting and Reading from Program Memory Address 4 6 2 Inputting or Overwriting Programs 4 6 3 Checking the Program 4 6 4 Displaying the Cycle Time 4 6 5 Program Searches 4 6 6 Inserting and Deleting Instructions 4 7...

Page 38: ...5 Draw the ladder diagram 6 Input the program into the CPU When using the Programming Console this will involve converting the program to mnemonic form 7 Check the program for syntax errors and correct these 8 Execute the program to check for execution errors and correct these 9 After the entire Control System has been installed and is ready for use execute the program and fine tune it if required...

Page 39: ...9 1203 1208 1200 0501 0502 0503 0504 1201 0100 0002 0010 0011 0003 HR 510 0007 TC 01 0515 1001 1002 0405 1005 1007 As shown in the diagram above instruction lines can branch apart and they can join back together The vertical pairs of lines are called conditions Con ditions without diagonal lines through them are called normally open condi tions and correspond to a LOAD AND or OR instruction The co...

Page 40: ...uctions is determined by the rela tionship between the conditions established by the instruction lines that con nect them Any group of conditions that go together to create a logic result is called a logic block Although ladder diagrams can be written without actually analyzing individual logic blocks understanding logic blocks is necessary for efficient programming and is essential when programs ...

Page 41: ...he same form one word to a line just as they appear in the ladder diagram symbols An example of mne monic code is shown below The instructions used in it are described later in the manual Address Instruction Operands 0000 LD HR 001 0001 AND 0001 0002 OR 0002 0003 LD NOT 0200 0004 AND 0201 0005 AND LD 0102 0006 MOV 21 00 DM 00 0007 CMP 20 DM 00 HR 0 0008 LD 0205 0009 OUT 0101 0010 MOV 21 DM 00 DM 0...

Page 42: ...on line the first one corresponds to a LOAD or LOAD NOT instruction the rest of the conditions to AND or AND NOT instructions The following example shows three conditions which correspond in order from the left to a LOAD an AND NOT and an AND instruction 0000 0100 HR 000 Instruction Address Instruction Operands 0000 LD 0000 0001 AND NOT 0100 0002 AND HR 000 0003 Instruction The instruction at the ...

Page 43: ...n condition would be produced for the next instruction When AND and OR instructions are combined in more complicated dia grams they can sometimes be considered individually with each instruction performing a logic operation on the execution condition and the status of the operand bit The following is one example Instruction 0002 0003 0000 0001 0200 Address Instruction Operands 0000 LD 0000 0001 AN...

Page 44: ... is ON or OFF can be controlled by combining the OUT or OUT NOT instruction with timer instructions Refer to Examples un der 5 11 1 TIMER TIM for details 4 3 5 The END Instruction The last instruction in any program must be the END instruction When the CPU cycles the program it executes all instructions up to the first END in struction before returning to the beginning of the program and beginning...

Page 45: ...not describe it in detail the following diagram would require an OR LOAD instruction between the top logic block and the bottom logic block An ON execution condition would be produced for the instruction at the right either when 0000 was ON and 0001 was OFF or when 0002 and 0003 were both ON Instruction 0000 0001 0002 0003 Address Instruction Operands 0000 LD 0000 0001 AND NOT 0001 0002 LD 0002 00...

Page 46: ...onic code because three pairs of conditions in series lie in parallel to each other 0000 0001 0002 0003 0040 0005 0101 The first of each pair of conditions is converted to LOAD with the assigned bit operand and then ANDed with the other condition The first two blocks can be coded first followed by OR LOAD the last block and another OR LOAD or the three blocks can be coded first followed by two OR ...

Page 47: ...execution condition resulting from the first logic block instruction and the execution condition of the logic block third from the end and on back to the first logic block that is being combined 0000 0001 0002 0003 0102 0004 0202 Block a Block b Block b2 Block b1 Address Instruction Operands 0000 LD NOT 0000 0001 AND 0001 0002 LD 0002 0003 AND NOT 0003 0004 LD NOT 0004 0005 AND 0202 0006 OR LD 000...

Page 48: ... b2 Blocks a and b Address Instruction Operands 0000 LD 0000 0001 AND NOT 0001 0002 LD NOT 0002 0003 AND 0003 0004 OR LD 0005 LD 0004 0006 AND 0005 0007 LD 0006 0008 AND 0007 0009 OR LD 0010 AND LD 0011 OUT 0103 This type of diagram can be coded easily if each block is worked with in or der first top to bottom and then left to right In the following diagram blocks a and b would be combined with AN...

Page 49: ...00 LD 0002 0001 AND NOT 0003 0002 OR 0001 0003 AND 0000 0004 LD NOT 0004 0005 AND 0005 0006 OR LD 0007 LD NOT 0006 0008 AND 0007 0009 OR LD 0010 OUT 0105 The following diagram requires five blocks which here are coded in order before using OR LD and AND LD to combine them starting from the last two blocks and working forward The OR LD at address 0008 combines blocks d and e the following AND LD co...

Page 50: ... is used to combine the execution conditions resulting from blocks a and b and the second one is used to combine the execution condition of block c with the execution condition resulting from the normally closed condition assigned 0003 The rest of the diagram can be coded with ladder instructions The logical flow for this and the resulting code are shown below 0000 0001 0105 0002 0003 0100 0101 00...

Page 51: ...wing diagrams illustrate this In both diagrams instruction 1 is executed before returning to the branching point and moving on to the branch line leading to instruction 2 Instruction 1 0002 0000 Instruction 2 Branching point Instruction 1 0002 0000 Instruction 2 Branching point Diagram B Needs Correction Diagram A OK 0001 Address Instruction Operands 0000 LD 0000 0001 Instruction 1 0002 AND 0002 0...

Page 52: ... 0000 is loaded a LOAD instruction to establish the initial execution condition This execution condition is then output using an OUTPUT instruc tion to TR 0 to store the execution condition at the branching point The exe cution condition is then ANDed with the status of 0001 and instruction 1 is executed accordingly The execution condition that was stored at the branch ing point is then loaded bac...

Page 53: ...ng pairs of dia grams the versions on the top require fewer instructions and do not require TR bits The first example achieves this by merely reorganizing the parts of the instruction block the second by separating the second OUTPUT instruc tion and using another LOAD instruction to create the proper execution con dition for it Instruction 1 0000 Instruction 2 0001 TR 0 Instruction 2 0000 Instruct...

Page 54: ...00 LD 0000 0001 IL 02 0002 LD 0001 0003 Instruction 1 0004 LD 0002 0005 Instruction 2 0006 ILC 03 If 0000 is ON in the revised version of diagram B above the status of 0001 and that of 0002 would determine the execution conditions for instructions 1 and 2 respectively on independent instruction lines Because here 0000 is ON this would produce the same results as ANDing the status of each of these ...

Page 55: ...END instruction without changing the status of anything between the JUMP and JUMP END instruction Actually there are two types of jumps All JUMP and JUMP END instructions are assigned jump numbers ranging between 00 and 08 The jump number used determines the type of jump A jump can be defined using jump numbers 01 through 08 only once i e each of these numbers can be used once in a JUMP instructio...

Page 56: ...be drawn as branching instruction lines if desired and would look exactly like their interlock equivalents The non branching form which is the form displayed on the GPC will be used in this manual 4 4 The Programming Console Depending on the model of Programming Console used it is either con nected to the CPU via a Programming Console Adapter and Connecting Ca ble or it is mounted directly to the ...

Page 57: ...as already been defined as a timer Pressed before designating an address in the TR area Pressed before designating an address in the LR area Cannot be used with the K type PCs Pressed before designating an address in the HR area Pressed before designating an address in the DM area Pressed before designating an indirect DM address Cannot be used with the K type PCs Pressed before designating a word...

Page 58: ...y in the same mode it was in before the pe ripheral device was attached The mode can be changed with the mode switch on the Programming Console once the password has been entered If it is necessary to have the PC in PROGRAM mode for the PROM Writer Floppy Disk Interface Unit etc be sure to select this mode before connect ing the peripheral device or alternatively apply power to the PC after the pe...

Page 59: ...he mode is set to RUN or MONITOR You can change the mode to RUN or MONITOR with the mode switch after entering the pass word Indicates the mode set by the mode selector switch PROGRAM PASSWORD PROGRAM 4 5 2 Clearing Memory Using the Memory Clear operation it is possible to clear all or part of the Pro gram Memory and the IR HR DM and TC areas Unless otherwise speci fied the clear operation will cl...

Page 60: ... entering REC RESET The CNT key is used for the en tire TC area The display will show those areas that will be cleared It is also possible to retain a portion of the Program Memory from the begin ning to a specified address After designating the data areas to be retained specify the first Program Memory address to be cleared For example to leave addresses 0000 to 0122 untouched but to clear addres...

Page 61: ...ill clear the present message and display the next error message Continue pressing MONTR until all messages have been cleared Although error messages can be accessed in any mode they can be cleared only in PROGRAM mode Key Sequence 4 6 Inputting Modifying and Checking the Program Once a program is written in mnemonic code it can be input directly into the PC from a Programming Console Mnemonic cod...

Page 62: ...esignate an address press CLR and then input the desired ad dress Leading zeros of the address need not be input i e when specifying an address such as 0053 you need to enter only 53 The contents of the des ignated address will not be displayed until the down key is pressed Once the down key has been pressed to display the contents of the desig nated address the up and down keys can be used to scr...

Page 63: ...nly when inputting function codes see below When designating operands be sure to designate the data area for all but IR and SR addresses by pressing the corresponding data area key or to designate a constant by pressing CONT CONT is not required for counter or timer SV see below TC numbers as bit operands i e comple tion flags are designated by pressing either TIM or CNT before the address dependi...

Page 64: ...d correction REPL ROM An attempt was made to write to ROM or to write protected RAM Be sure a RAM Unit is mounted and that its write protect switch is set to OFF PROG OVER The instruction at the last address in memory is not NOP 00 Erase all unnecessary instructions at the end of the program or use a larger Memory Unit ADDR OVER An address was set that is larger than the highest memory in Program ...

Page 65: ... block whose execution condition has not been used by another instruction or a logic block instruction has been used that does not have the required number of logic blocks i e unused execution conditions Check your program IL ILC ERR IL 02 and ILC 03 are not used in pairs Correct the program so that each IL 02 has a unique ILC 03 Although this error message will appear if more than one IL 02 is us...

Page 66: ...sult of a program check Display 1 Display 2 Display 3 Halts program check Check continues until END 01 When errors are found 0128PROG CHKEND 1150PROG CHK END 01 0178CIRCUIT ERR OUT 0200 0196COIL DUPL OUT 0500 0200IL ILC ERR ILC 03 1193NO ENDINSTR END 0000 0064PROG CHK 4 6 4 Displaying the Cycle Time Once the program has been cleared of syntax errors the cycle time should be checked This is possibl...

Page 67: ...ction input the instruction just as when inputting the pro gram and press SRCH Once an occurrence of an instruction or bit address has been found any additional occurrences of the same instruction or bit can be found by pressing SRCH again SRCHG will be displayed while a search is in progress When the first word of a multiword instruction is displayed for a search opera tion the other words of the...

Page 68: ...H LD 0000 0202 LD 0000 1082SRCH END 01 0000 0100 0100 TIM 01 0203SRCH TIM 01 0203 TIM DATA 0123 Example Bit Search 0000 0000 CONT 0005 0200CONT SRCH LD 0005 0203CONT SRCH AND 0005 1078CONT SRCH END 01 Inputting Modifying and Checking the Program Section 4 6 ...

Page 69: ...ds for the designated instruction will be deleted Caution Be careful not to inadvertently delete instructions there is no way to recover them without reinputting them completely Key Sequence When an instruction is inserted or deleted all addresses in Program Memory following the operation are adjusted automatically so that there are no blank addresses and no unaddressed instructions The following ...

Page 70: ... an Instruction 0000 0000 OUT 0000 0000 OUT 0201 0207SRCH OUT 0201 0206READ AND NOT 0104 0206 AND 0000 0206 AND 0105 0206INSERT AND 0105 0207INSERT END AND NOT 0104 0206READ AND 0105 Address Instruction Operands 0000 LD 0100 0001 AND 0101 0002 LD 0201 0003 AND NOT 0102 0004 OR LD 0005 AND 0103 0006 AND 0105 0007 AND NOT 0104 0008 OUT 0201 0009 END 01 Inputting Modifying and Checking the Program Se...

Page 71: ...though details are provided in 5 6 Bit Control Instructions these instructions are described here because of their impor tance in most programs Although these instructions are used to turn ON and OFF output bits in the IR area i e to send or stop output signals to external devices they are also used to control the status of other bits in the IR area or in other data areas 4 7 1 DIFFERENTIATE UP an...

Page 72: ...3 0005 Address Instruction Operands 0000 LD 0002 0001 AND NOT 0003 0002 LD 0004 0003 OR 0005 0004 KEEP 11 HR 000 4 7 3 Self maintaining Bits Seal Although the KEEP instruction can be used to create self maintaining bits it is sometimes necessary to create self maintaining bits in another way so that they can be turned OFF when in an interlocked section of a program To create a self maintaining bit...

Page 73: ...s given later in this subsection show two of the most common ways to employ work bits These should act as a guide to the almost limitless num ber of ways in which the work bits can be used Whenever difficulties arise in programming a control action consideration should be given to work bits and how they might be used to simplify programming Work bits are often used with the OUTPUT OUTPUT NOT DIFFE...

Page 74: ...ditions to determine output conditions for IR 0100 IR 0101 and IR 0102 i e to turn the outputs allocated to these bits ON or OFF 0000 0003 0001 0004 0002 0005 0004 0007 0006 0005 0112 0112 0112 0112 0100 0101 0102 Address Instruction Operands 0000 LD 0000 0001 AND NOT 0001 0002 OR 0002 0003 OR NOT 0003 0004 OUT 0112 0005 LD 0112 0006 AND 0004 0007 AND NOT 0005 0008 OUT 0100 0009 LD 0112 0010 OR NO...

Page 75: ... 0000 LD 0000 0001 DIFU 13 0112 0002 LD 0112 0003 LD 0001 0004 AND NOT 0002 0005 AND NOT 0003 0006 OR LD 0007 LD 0004 0008 AND NOT 0005 0009 OR LD 0010 OUT 0100 4 9 Programming Precautions The number of conditions that can be used in series or parallel is unlimited Therefore use as many conditions as required to draw a clear diagram Al though very complicated diagrams can be drawn with instruction...

Page 76: ...ons and is controlled by the execution condition of the first of the pair Conditions should not be placed on the in struction lines leading to these instructions Refer to Section 5 Instruction Set for details When drawing ladder diagrams it is important to keep in mind the number of instructions that will be required to input it In diagram A below an OR Load instruction will be required to combine...

Page 77: ...the desired data is moved to a word before that word is used as the operand for an instruction Remember that an in struction line is completed to the terminal instruction at the right before exe cuting any instruction lines branching from the first instruction line to other terminal instructions at the right Program execution is only one of the tasks carried out by the CPU as part of the cycle tim...

Page 78: ... COUNTER CNTR 12 5 11 6 HIGH SPEED DRUM COUNTER HDM 61 5 11 7 REVERSIBLE DRUM COUNTER RDM 60 5 12 Data Shifting 5 12 1 SHIFT REGISTER SFT 10 5 12 2 REVERSIBLE SHIFT REGISTER SFTR 84 5 12 3 WORD SHIFT WSFT 16 5 13 Data Movement 5 13 1 MOVE MOV 21 5 13 2 MOVE NOT MVN 22 5 14 DATA COMPARE CMP 20 5 15 Data Conversion 5 15 1 BCD TO BINARY BIN 23 5 15 2 BINARY TO BCD BCD 24 5 15 3 4 TO 16 DECODER MLPX 7...

Page 79: ...x B Programming Instructions and Execu tion Times If an instruction is assigned a function code it will be given in parentheses after the mnemonic These function codes which are 2 digit decimal num bers are used to input most instructions into the CPU A table of instructions listed in order of function codes is also provided in Appendix B Programming Instructions and Execution Times 5 3 Instructio...

Page 80: ...g as the SR area is also allowed for that operand The Flags subsection lists flags that are affected by execution of the instruc tion These flags include the following SR area flags Abbreviation Name Bit ER Instruction Execution Error flag 1903 CY Carry flag 1904 EQ Equals flag 1906 GR Greater Than flag 1905 LE Less Than flag 1907 ER is the flag most often used for monitoring an instruction s exec...

Page 81: ...quickly scanned to see if any addresses have been left out If an IR or SR address is used in the data column the left side of the column is left blank If any other data area is used the data area abbreviation is placed on the left side and the address is place on the right side If a con stant is to be input the number symbol is placed on the left side of the data column and the number to be input ...

Page 82: ...OT 0100 TR bits in a program are used to output OUT the execution condition at the branching point and then to load back LD the execution condition when it is required after returning to the branch lines Within any one instruction block OUT cannot be used with the same TR address The same TR address can however be used with LD as many times as required The following example shows an instruction bl...

Page 83: ...05 0012 OUT 0103 When coding IL 02 and ILC 03 the mnemonic code will be the same re gardless of whether the instruction is drawn as branching instruction lines or whether IL 02 is placed on its own instruction line If drawn as branching instruction lines each branch line is coded as if it were connected to the bus bar i e the first condition on each branch line corresponds to a LD or LD NOT instru...

Page 84: ...Ladder Symbol Operand Data Areas LOAD LD B B Bit IR SR HR TC TR Ladder Symbol Operand Data Areas LOAD NOT LD NOT B B Bit IR SR HR TC TR Ladder Symbol Operand Data Areas AND AND B B Bit IR SR HR TC TR Ladder Symbol Operand Data Areas AND NOT AND NOT B B Bit IR SR HR TC TR Ladder Symbol Operand Data Areas OR OR B B Bit IR SR HR TC TR Ladder Symbol Operand Data Areas OR NOT OR NOT B There is no limit...

Page 85: ... TR bits is different from that shown above Refer to Section 4 Writing and Input ting the Program There are no flags affected by these instructions 5 5 2 AND LOAD and OR LOAD Ladder Symbol AND LOAD AND LD 0002 0003 0000 0001 Ladder Symbol OR LOAD OR LD 0000 0001 0002 0003 When the above instructions are combined into blocks that cannot be logi cally combined using only OR and AND operations AND LD...

Page 86: ...ng point rather than at the end of an instruction line OUT NOT turns ON the designated bit for a OFF execution condition and turns OFF the designated bit for an ON execution condition OUT and OUT NOT can be used to control execution by turning ON and OFF bits that are assigned to conditions on the ladder diagram thus determining execution conditions for other instructions This is particularly help...

Page 87: ...n a single cycle execution of a particular in struction is desired Examples of these are shown below DIFU 13 and DIFD 14 operation can be tricky when used in programming between IL and ILC between JMP and JME or in subroutines Refer to 5 7 INTERLOCK and INTERLOCK CLEAR IL 02 and ILC 03 and 5 8 JUMP and JUMP END JMP 04 JME 05 for details A total of 48 DIFU 13 DIFD 14 can be used in a program If mor...

Page 88: ... of whether R stays ON or goes OFF The relationship between execution conditions and KEEP 11 bit status is shown below S execution condition R execution condition Status of B Notice that KEEP 11 operates like a self maintaining bit The following two diagrams would function identically though the one using KEEP 11 requires one less instruction to program and would maintain status even in an inter l...

Page 89: ... turned ON for any of the three bits which indicates emergency situation is used to turn ON the warn ing indicator through 0500 HR 000 0500 0002 0003 0004 0005 Reset input Indicates emergency situation Activates warning display Address Instruction Operands 0000 LD 0002 0001 OR 0003 0002 OR 0004 0003 LD 0005 0004 KEEP 11 HR 000 0005 LD HR 000 0006 OUT 0500 S R KEEP 11 HR 000 KEEP 11 can also be com...

Page 90: ...tion for the DIFU 13 or DIFD 14 will be compared to the execution condition that existed before the interlock became effective i e before the interlock condition for IL 02 went OFF The ladder diagram and bit status changes for this are shown below The interlock is in effect while 0000 is OFF Notice that 1000 is not turned ON at the point labeled A even though 0001 has turned OFF and then back ON 0...

Page 91: ...r Values JMP 04 N N Jump number 00 to 08 Ladder Symbols Definer Values JME 05 N Jump numbers 01 through 08 may be used only once in JMP 04 and once in JME 05 i e each can be used to define one jump only Jump number 00 can be used as many times as desired JMP 04 is always used in conjunction with JME 05 to create jumps i e to skip from one point in a ladder diagram to another point JMP 04 defines t...

Page 92: ...ump from JMP 04 to JME 05 is not made i e if a bit is turned ON by DIFU 13 or DIFD 14 and then a jump is made that skips the DIFU 13 or DIFD 14 the designated bit will remain ON until the next time the execution condition for the JMP 04 controlling the jump is ON When JMP 04 and JME 05 are not used in pairs an error message will ap pear when the program check is performed Although this message als...

Page 93: ...requires bit data the TC number accesses a bit that functions as a completion flag that indicates when the time count has expired i e the bit which is normally OFF will turn ON when the designated SV has expired When designated as an operand that requires word data the TC number accesses a memory lo cation that holds the present value PV of the timer or counter The PV of a timer or counter can thu...

Page 94: ... ON long enough for TIM to time down to zero the completion flag for the TC number used will turn ON and will remain ON until TIM is reset i e until its execution condition goes OFF The following figure illustrates the relationship between the execution condi tion for TIM and the completion flag assigned to it Execution condition Completion flag ON OFF ON OFF SV SV Timers in interlocked program se...

Page 95: ...onsecutive timers with the completion flag of each timer used to activate the next timer A simple example with two 900 0 second 15 minute timers combined to functionally form a 30 minute timer 0000 TIM 01 TIM 02 0200 Address Instruction Operands 0000 LD 0000 0001 TIM 01 9000 0002 LD TIM 01 0003 TIM 02 9000 0004 LD TIM 02 0005 OUT 0200 TIM 01 9000 TIM 02 9000 900 0 s 900 0 s In this example 0200 wi...

Page 96: ...is kept ON or OFF can be controlled by combin ing TIM with OUT or OUT NOT The following diagram demonstrates how this is possible In this example 0204 would remain ON for 1 5 seconds after 0000 goes ON regardless of the time 0000 stays ON This is achieved by using 1000 activated by 0000 to turn ON 0204 When TIM 01 comes ON i e when the SV of TIM 01 has expired 0204 will be turned OFF through TIM 0...

Page 97: ... that is to be ON when the flicker bit is operating Although this method does not use TIM it is included here for comparison This method is more limited because the ON and OFF times must be the same and they depend on the clock pulse bits available in the SR area 5 11 2 HIGH SPEED TIMER TIMH 15 N TC number 00 though 47 Ladder Symbol Definer Values SV Set value word BCD IR HR Operand Data Areas TIM...

Page 98: ...ends the Start control bit Pause control bit and Range bits to the Unit Bit Input word Output word 00 T0 Time Expired flag T0 Start control bit 01 T1 Time Expired flag T1 Start control bit 02 T2 Time Expired flag T2 Start control bit 03 T3 Time Expired flag T3 Start control bit 04 T0 Pause control bit 05 T1 Pause control bit 06 T2 Pause control bit 07 T3 Pause control bit 08 T0 Range bits 09 Canno...

Page 99: ... SV Range Resistor adjustment T0 Approx 0 6 s 0 1 to 1 s 6 10th turn clockwise T1 Approx 3 s 1 to 10 s 3 10th turn clockwise T2 Approx 2 6 s 10 to 60 s 2 10th turn clockwise T3 Approx 8 min 1 to 10 min 8 10th turn clockwise The following program sections are used to set up the required data and pro duce outputs from the four timers The first section moves E400 into IR 06 to set the desired ranges ...

Page 100: ... for T0 expires T1 started 0501 turned ON when time for T1 expires T2 and T3 started 0502 turned ON when time for T2 expires 0502 turned ON when time for T3 expires T0 Time Expired Flag T0 Start Control Bit T1 Time Expired Flag T2 Time Expired Flag T3 Time Expired Flag T1 Start Control Bit T2 Start Control Bit T3 Start Control Bit Address Instruction Operands 0000 LD 0015 0001 OUT 0606 0002 OUT 06...

Page 101: ...N when the PV reaches zero and will remain ON until the counter is reset CNT is reset with a reset input R When R goes from OFF to ON the PV is reset to SV The PV will not be decremented while R is ON Counting down from SV will begin again when R goes OFF The PV for CNT will not be reset in interlocked program sections or for power interruptions Changes in execution conditions the completion flag ...

Page 102: ...T 04 1815 Address Instruction Operands 0000 LD 0000 0001 AND 0001 0002 LD 0002 0003 OR 1815 0004 CNT 04 0150 0005 LD CNT 04 0006 OUT 0205 Counters that can count past 9 999 can be programmed by using one CNT to count the number of times another CNT has reached zero from SV In the following example 0000 is used to control when CNT 01 operates and CNT 01 when 0000 is ON counts down the number of OFF...

Page 103: ...s continuously and CNT 02 counts the number of times the completion flag for TIM 01 goes ON CNT 02 would be executed once each time between when the completion flag for TIM 01 goes ON and TIM 01 is reset by its completion flag TIM 01 is also reset by the completion flag for CNT 02 so that the extended timer would not start again until CNT 02 was reset by 0001 which serves as the reset for the enti...

Page 104: ...ter i e it is used to count between zero and SV according to changes in two execution condi tions those in the increment input II and those in the decrement input DI The present value PV will be incremented by one whenever CNTR 12 is executed with an ON execution condition for II and the execution condition was OFF for II for the last execution The present value PV will be decre mented by one when...

Page 105: ...0001 0000 0000 SV SV 1 SV 2 Program execution will continue even if a non BCD SV is used but the SV will not be correct ER SV is not in BCD 5 11 6 HIGH SPEED DRUM COUNTER HDM 61 N TC number Must be 47 Ladder Symbol Definer Values R Result word IR HR DM Operand Data Areas HDM 61 N R If any of the lower limits for the DM ranges are set to 0000 the correspond ing output bits are turned ON when the hi...

Page 106: ... high speed counter the following bits are reserved and can not be used for any other purpose Input 0000 count input Input 0001 hard reset SR bit 1807 soft reset TC 47 present count value DM 32 to 63 upper and lower limits Note If a power failure occurs the count value of the high speed counter immedi ately before the power failure is retained The high speed counter is programmed differently depen...

Page 107: ... value of counter 47 and R is the results word Lower limit Upper limit Present value of the counter Bit of R that turns ON DM 32 DM 33 Value of DM 32 S value of DM 33 00 DM 34 DM 35 Value of DM 34 S value of DM 35 01 DM 36 DM 37 Value of DM 36 S value of DM 37 02 DM 38 DM 39 Value of DM 38 S value of DM 39 03 DM 40 DM 41 Value of DM 40 S value of DM 41 04 DM 42 DM 43 Value of DM 42 S value of DM 4...

Page 108: ...tart input 0002 Output 0500 Output 0501 Count input 0000 200 600 1500 2000 Address Instruction Operands The maximum response speed of the high speed counter hardware is 2 kHz Note however that the start signal reset signal in the case of soft reset and corresponding outputs are all processed by software Because of this re sponse may be delayed by the cycle time When programming the high speed coun...

Page 109: ...1 S34 DM 33 MOV 21 S64 DM 35 HDM 61 47 HR 1 Address Instruction Operands 0000 LD 1813 0001 MOV 21 S1 DM 32 0002 MOV 21 S2 DM 33 0003 MOV 21 S32 DM 35 0004 LD 0002 0005 HDM 61 47 HR 0 0006 LD 1813 0007 MOV 21 S33 DM 32 0008 MOV 21 S34 DM 33 0009 MOV 21 S64 DM 35 0010 LD 0002 0011 HDM 61 47 HR 1 In this program each bit in the specified words HR 0 and HR 1 are turned ON under the following condition...

Page 110: ...01 CMP 20 CNT 47 6850 0002 AND 1905 0003 OUT 0600 In the above program output 0600 is turned ON when the following condition is satisfied where S is the present count value of the high speed counter 6 850 S 9 999 1813 normally ON 1905 GR 1000 CMP 20 CNT 47 0300 1813 normally ON 1907 LE 1001 CMP 20 CNT 47 2300 1000 1001 0601 Address Instruction Operands 0000 LD 1813 0001 CMP 20 CNT 47 0300 0002 AND...

Page 111: ...D 1813 0010 CMP 20 CNT 46 0002 0011 AND 1906 0012 AND HR 000 0013 OUT 0500 In the above program example output 0500 is turned ON when the following condition is satisfied where S is the present count value of the high speed counter 20 000 S 25 000 In hard reset mode program SR 1810 which turns ON for one cycle time upon input of the hard reset signal to CNTR as the reset input Unless CNTR and CMP ...

Page 112: ...it switch for pusher LS2 0004 Upper limit switch for stopper LS3 0005 Moving stopper Lower limit switch for stopper LS4 0006 Motor 1 M1 PH1 0002 E6A 0000 M1 rise 0100 LS4 0006 LS3 0005 M2 forward 0102 LS2 0004 LS1 0003 M2 backward 0103 M1 fall 0101 In this example x is the number of pulses per package To detect four pack ages therefore 4x must be set as the preset value of the high speed counter T...

Page 113: ...1 0102 0103 0003 0101 0011 0100 Transfer limit values Resets counter upon power application or at stopper operation Counts pulses from encoder only when PH1 is ON Normally counts 4 packages When input 0011 is ON counts 6 packages Pushes stopper up at count up to stop following packages Pushes packages out Returns pusher to original position after operation Pushes stopper down and continues operati...

Page 114: ...ner Values R Result word IR HR DM Operand Data Areas RDM 60 N R If any of the lower limits for the DM ranges are set to 0000 the correspond ing output bits are turned ON when the counter is reset The reversible drum counter is a ring counter with a counting range of 0000 to 9999 It requires three input signals to operate a count input reset input and UP DOWN selection input For these inputs SR bit...

Page 115: ... power failure is retained The following table shows the upper and lower limits that need to be set in DM 00 through DM 31 In this table S is the present value of counter 46 and R is the result word Lower limit Upper limit Present value of the counter Bit of R that turns ON DM 00 DM 01 Value of DM 00 S value of DM 01 00 DM 02 DM 03 Value of DM 02 S value of DM 03 01 DM 04 DM 05 Value of DM 04 S va...

Page 116: ... of MOV 21 for setting limits 1813 normally ON 0002 start input MOV 21 0200 DM 00 MOV 21 1500 DM 01 MOV 21 0600 DM 02 MOV 21 2000 DM 03 RDM 60 46 05 Transfers preset value to DM 00 to 03 Corresponding result word is 05 0000 LD 1813 0001 MOV 21 0200 DM 00 0002 MOV 21 1500 DM 01 0003 MOV 21 0600 DM 02 0004 MOV 21 2000 DM 03 0005 LD 0002 0006 RDM 60 46 05 Address Instruction Operands Address Instruct...

Page 117: ...ible shift register that is controlled through the bits in a control word WSFT 16 creates a multiple word register that shifts by word 5 12 1 SHIFT REGISTER SFT 10 St Starting word IR HR E End word IR HR Operand Data Areas Ladder Symbol I P SFT 10 St E R E must be less than or equal to St and St and E must be in the same data area If a bit address in one of the words used in a shift register is al...

Page 118: ...e shift register E designates the left most The shift register includes both of these words and all words between them The same word may be designated for St and E to create a 16 bit i e 1 word shift register When execution condition R goes ON all bits in the shift register will be turned OFF i e set to 0 and the shift register will not operate until R goes OFF again There are no flags affected by...

Page 119: ...any other instruc tion that controls bit status a syntax error will be generated during the pro gram check but the program will execute properly i e as written The following program controls the conveyor line shown below so that faulty products detected at the sensor are pushed down a chute To do this the execution condition determined by inputs from the first sensor 0001 are stored in a shift reg...

Page 120: ...002 0500 Sensor 0001 Rotary Encoder 0000 Pusher 0000 LD 0001 0001 LD 0000 0002 LD 0003 0003 SFT 10 HR 0 HR 1 0004 LD HR 003 0005 OUT 0500 0006 LD 0002 0007 OUT NOT 0500 0008 OUT NOT HR 003 I P SFT 10 HR 0 HR 1 R 0001 0000 0003 0500 HR 003 0002 HR 003 0500 Address Instruction Operands 5 12 2 REVERSIBLE SHIFT REGISTER SFTR 84 C Control word IR DM HR St Starting word IR DM HR Ladder Symbols Operand D...

Page 121: ...ndition or if SFTR 84 is executed with bit 14 OFF the shift register will remain unchanged If SFTR 84 is executed with an ON ex ecution condition and the reset bit bit 15 is OFF the entire shift register and CY will be set to zero Flags ER St and E are not in the same data area or St is greater than E Indirectly addressed DM word is non existent Content of DM word is not BCD or the DM area boundar...

Page 122: ...rea or between different data areas Data movement is es sential for utilizing all of the data areas of the PC All of these instructions change only the content of the words to which data is being moved i e the content of source words is the same before and after execution of any of the move instructions 5 13 1 MOVE MOV 21 S Source word IR SR DM HR TC D Destination word IR DM HR Ladder Symbol Opera...

Page 123: ...n describes the instruction used for comparing data CMP 20 is used to compare the contents of two words Cp1 First compare word IR SR DM HR TC Cp2 Second compare word IR SR DM HR TC Ladder Symbols Operand Data Areas CMP 20 Cp1 Cp2 When comparing a value to the PV of a timer or counter the value must be four digit BCD When the execution condition is OFF CMP 20 is not executed and the next instructio...

Page 124: ... Operands Address Instruction Operands 0000 LD 0000 0001 OUT TR 0 0002 CMP 20 HR 8 HR 9 0003 LD TR 0 0004 AND 1905 0005 OUT 0200 0006 LD TR 0 0007 AND 1906 0008 OUT 0201 0009 LD TR 0 0010 AND 1907 0011 OUT 0202 The following example uses TIM CMP 20 and the LE flag 1907 to pro duce outputs at particular times in the timer s countdown The timer is started by turning ON 0000 When 0000 is OFF the TIM ...

Page 125: ... CMP 20 TIM 10 CMP 20 TIM 10 4000 0201 0204 0202 0000 0200 1907 0200 1907 0201 1907 TIM 10 Output at 100 s Output at 200 s Output at 300 s Output at 500 s Address Instruction Operands Address Instruction Operands 0000 LD 0000 0001 TIM 10 0500 0002 CMP 20 TIM 10 4000 0003 AND 1907 0004 OUT 0200 0005 LD 0200 0006 CMP 20 TIM 10 3000 0007 AND 1907 0008 OUT 0201 0009 LD 0201 0010 CMP 20 TIM 10 2000 001...

Page 126: ...an BCD arithmetic operations e g when BCD and binary values must be added ER The content S is not BCD EQ ON when 0000 is placed in R 5 15 2 BINARY TO BCD BCD 24 S Source word binary IR SR DM HR TC R Result word IR DM HR Ladder Symbol Operand Data Areas BCD 24 S R If the content of S exceeds 270F the converted result would exceed 9999 and BCD 24 will not be executed When the instruction is not exec...

Page 127: ...ing is an example of a one digit decode operation from digit num ber 1 of S i e here Di would be 0001 S R C 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Bit C i e bit number 12 turned ON The first digit and the number of digits to be converted are designated in Di If more digits are designated than remain in S counting from the designated first digit the remaining digits will be taken starting back at the begi...

Page 128: ... MLPX 76 DM 20 0021 HR 1 S DM 20 R HR 1 R 1 HR 2 R 2 HR 3 DM 00 20 HR 100 0 HR 200 0 HR 300 1 DM 01 21 HR 101 0 HR 201 0 HR 301 0 DM 02 22 HR 102 0 HR 202 0 HR 302 0 DM 03 23 HR 103 0 HR 203 0 HR 303 0 DM 04 1 20 HR 104 0 HR 204 0 HR 304 0 DM 05 1 21 1 HR 105 0 HR 205 0 HR 305 0 DM 06 1 22 HR 106 0 HR 206 1 HR 306 0 DM 07 1 23 HR 107 0 HR 207 0 HR 307 0 DM 08 0 20 HR 108 0 HR 208 0 HR 308 0 DM 09 ...

Page 129: ...its to be encoded The following is an example of a one digit encode operation to digit number 1 of R i e here Di would be 0001 R S C 0 0 0 1 0 0 0 1 0 0 0 1 0 1 1 0 C transferred to indicate bit number 12 as the highest ON bit Up to four digits from four consecutive source words starting with S may be encoded and the digits written to R in order from the designated first digit If more digits are d...

Page 130: ...gits of HR 2 and then encodes DM 10 and 11 to the last two digits of HR 2 Although the status of each source word bit is not shown it is as sumed that the bit with status 1 ON shown is the highest bit that is ON in the word 0000 DMPX 77 10 HR 2 0010 DM10 HR 2 0012 IR 010 1000 1011 1 1012 0 1015 0 DM 10 DM1000 DM1001 1 DM1002 0 DM1015 0 Digit 0 IR 011 1100 1109 1 1110 0 1115 0 Digit 1 Digit 2 Digit...

Page 131: ...if required before it is changed by execution of any other instruction 5 16 1 BCD ADD ADD 30 Au Augend word BCD IR SR DM HR TC Ad Addend word BCD IR SR DM HR TC Ladder Symbol Operand Data Areas R Result word IR DM HR ADD 30 Au Ad R When the execution condition is OFF ADD 30 is not executed and the next instruction is moved to When the execution condition is ON ADD 30 adds the contents of Au Ad and...

Page 132: ...30 s and combining the augend and the addend words of one ADD 30 with those of the other two 8 digit values can be added The result may or may not be 9 digits depending on whether a carry is generated 0000 LD 0002 0001 DIFU 13 1000 0003 LD 1000 0004 OUT TR 0 0005 CLC 41 0006 AND 30 DM 00 DM 02 DM 04 0007 AND 30 DM 01 DM 03 DM 05 0008 AND 1904 0009 MOV 21 0001 DM 06 0010 LD TR 0 0011 AND NOT 1904 0...

Page 133: ...n will be executed every cycle as long as the execution condition remains ON If the instruction is to be executed only once then it must be used in conjunction with DIFU 13 or DIFD 14 Mi Su CY CY R ER Mi and or Su is not BCD CY ON when the result is negative i e when Mi is less than Su plus CY EQ ON when the result is 0 Caution Be sure to clear the carry flag with CLC 41 before executing SUB 31 if...

Page 134: ...04 HR 300 First subtraction Second subtraction Turned ON to indicate negative result 0000 LD 0002 0001 OUT TR 0 0002 CLC 41 0003 SUB 31 10 DM 01 HR 2 0004 AND 1904 0005 CLC 41 0006 SUB 31 0000 HR 2 HR 2 0007 LD TR 0 0008 AND 1904 0009 OR HR 300 0010 OUT HR 300 Address Instruction Operands 5 16 3 BCD MULTIPLY MUL 32 Md Multiplicand word BCD IR DM HR TC Mr Multiplier word BCD IR DM HR TC Ladder Symb...

Page 135: ... the result is 0 When IR 0000 is ON with the following program the contents of IR 13 and DM 05 are multiplied and the result is placed in HR 7 and HR 8 Example data and calculations are shown below the program MUL 32 13 DM 05 HR 7 0000 R 1 HR 8 R HR 7 0 0 0 8 3 9 0 0 MD IR 13 3 3 5 6 MR DM 05 0 0 2 5 X Address Instruction Operands 0000 LD 0000 0001 MUL 32 13 DM 05 HR 7 5 16 4 BCD DIVIDE DIV 33 Dd ...

Page 136: ...e following program the content of IR 20 is di vided by the content of HR 9 and the result is placed in DM 17 and DM 18 Example data and calculations are shown below the program DIV 33 20 HR 9 DM 17 0000 R DM 17 R 1 DM 18 1 1 5 0 0 0 0 2 Dd IR 20 3 4 5 2 Quotient Remainder Dd IR 20 0 0 0 3 Address Instruction Operands 0000 LD 0000 0001 DIV 33 20 HR 9 DM 17 5 16 5 SET CARRY STC 40 Set carry is used...

Page 137: ...ber N that is programmed as a definer for SBN 92 This same subroutine num ber is used in any SBS 91 that calls the subroutine see next section No subroutine number is required with RET 93 All subroutines must be programmed at the end of the main program When one or more subroutines have been programmed the main program will be executed up to the first SBN 92 before returning to address 0000 for th...

Page 138: ...th SBN 92 The following diagram illustrates program execution flow for various execu tion conditions for two SBS 91 In actual execution the PC actually executes a sequential program with the subroutines inserted in at the required loca tions SBS 91 00 SBS 91 01 SBN 92 00 RET 93 SBN 92 01 RET END 01 Main program Subroutines A B C D E A A A A B B B B C C C C D D E E OFF execution conditions for 00 a...

Page 139: ... be used at different locations before the step to control the step according to two different execution conditions see example 2 below Any step in the pro gram that has not been started with SNTX 09 will not be executed Once SNXT 09 is used in the program step execution will continue until STEP 08 is executed without a control bit STEP 08 without a control bit must be preceded by SNXT 09 with a d...

Page 140: ...rruption If it is necessary to maintain status to resume execution at the same step HR bits must be used 1811 Step Start flag turns ON for one cycle when STEP 08 is executed and can be used to reset counters in steps as shown below if neces sary SNXT 09 1000 CP R CNT 01 0003 0000 0100 1811 STEP 08 1000 1 cycle 1811 1000 Start 0000 LD 0000 0001 SNXT 09 1000 0002 STEP 08 1000 0003 LD 0100 0004 LD 18...

Page 141: ...harge be executed in sequence with each process being reset before continuing on to the next process Various sensors SW1 SW2 SW3 and SW4 are positioned to signal when processes are to start and end SW 1 SW 2 SW 3 SW 4 Loading Part installation Inspection discharge The following diagram demonstrates the flow of processing and the switches that are used for execution control Process A Process B Proc...

Page 142: ...004 0301 SNXT 09 1003 0302 STEP 08 1003 SNXT 09 1000 0001 SW1 STEP 08 1000 SNXT 09 1001 STEP 08 1001 SNXT 09 1002 STEP 08 1002 SNXT 09 1003 STEP 08 Process A Process B Process C 0002 SW2 0003 SW3 0004 SW4 Process A started Process A reset Process B started Process B reset Process C started Process C reset The following process requires that a product is processed in one of two ways depending on it...

Page 143: ... starts the step for process C 0000 LD 0001 0001 AND NOT 0002 0002 SNXT 09 1400 0003 LD NOT 0001 0004 AND 0002 0005 SNXT 09 1401 0006 STEP 08 1400 SNXT 09 1401 0002 SW B2 STEP 08 1400 SNXT 09 1402 STEP 08 1401 SNXT 09 1402 STEP 08 1402 SNXT 09 1403 STEP 08 Process A Process B Process C 0003 SW A2 0004 SW B2 0005 SW D Process A started Process A reset Process C started Process B reset Process C sta...

Page 144: ...Process E End Process C SW7 Process B Process D SW3 SW4 SW 1 and SW2 both ON SW5 and SW6 both ON The program for this operation shown below starts with two SNXT 09 that start processes A and C These instructions branch from the same instruction line and are always executed together starting steps for both A and C When the steps for both A and C have finished the steps for process B and D be gin im...

Page 145: ...C started 1003 SNXT 09 1004 0004 SW5 and SW6 1003 STEP 08 1002 Process E started Used to turn off process D 0003 SW4 SNXT 09 1003 STEP 08 1003 Process C reset Process D started Process D Process E Address Instruction Operands 0000 LD 0001 0001 SNXT 09 1000 0002 SNXT 09 1002 0003 STEP 08 1000 Address Instruction Operands 0100 LD 0002 0101 SNXT 09 1001 0102 STEP 08 1001 Address Instruction Operands ...

Page 146: ...2 END WAIT ENDW 62 Ml Multiplier BCD Ladder Symbol Operand Data Areas ENDW 62 Ml ENDW 62 can be used to specify a minimum cycle time for the PC When the execution condition is OFF ENDW 62 is not executed and the next in struction is moved to When the execution condition is ON the CPU will wait at the end of program execution until the cycle time reaches 100 µs X Ml be ginning the next cycle If pro...

Page 147: ... 63 C1 C2 NETW 63 is not executed regardless of its execution condition It is provided so that the programmer can leave comments in the program The operands may be any hexadecimal value from 0000 through FFFF There are no flags affected by this instruction Description Flags Special Instructions Section 5 19 ...

Page 148: ...37 SECTION 6 Program Execution Timing 6 1 Introduction 6 2 Cycle Time 6 3 Calculating Cycle Time 6 3 1 Single PC Unit 6 3 2 PC with Additional Units 6 4 Instruction Execution Times 6 5 I O Response Time ...

Page 149: ...e desired control ac tion is achieved at the right time The major factors in determining program timing are the cycle time and the I O response time One cycle of CPU operation is called a cycle the time required for one cycle is called the cycle time The time required to produce a control output signal following reception of an input signal is called the I O response time This section explains the...

Page 150: ...ming and PC operations The overall flow of CPU operation is as shown in the following flowchart YES NO Power application Clears IR area and resets all timers Checks I O Unit connections Resets watchdog timer Checks hardware and Program Memory Check OK Resets watchdog timer Services Peripheral Devices ERROR or ALARM Sets error flags and lights indicator Executes program Input and output refreshing ...

Page 151: ...d and execution conditions Refer to 6 4 Instruction Execution Times for details 4 Input refreshing Output refreshing Reading data input from input terminals and writing the results of instruction execution to output terminals 0 51 ms 0 03 ms times N where N number of input and output words 2 The cycle time can be obtained by adding the four cycle time components identified above An adequately shor...

Page 152: ...ion time can be calculated by obtaining the average instruction execution time and multiplying this by the number of addresses used in the program As only LD and OUT are used in this program and they have ex ecution times of 12 µs and 17 5 µs respectively the average instruction ex ecution time is 2 12 µs 17 5 µs 14 75 µs The total execution time is equal to this average instruction execution time...

Page 153: ...s 0 51 ms 0 03 ms x N As the C40K is provided with only one input and one output word and the C40P Expansion unit contains input and output words the value of the con stant N is 8 i e N 10 2 8 and so the time required is 0 51 ms 0 03 ms x 8 0 75 ms The total execution time can be calculated by obtaining the average instruc tion execution time and multiplying this by the number of addresses used in...

Page 154: ...n instruction can also vary depending on the circumstances i e whether it is in an interlocked program section and the execution condition for IL is OFF whether it is between JMP 04 00 and JME 05 00 and the execution condi tion for JMP 04 00 is OFF or whether it is reset by an OFF execution condi tion R IL and JMP are used to indicate these three times Execution times are expressed in microseconds...

Page 155: ...rd 23 BIN 115 When converting transferring a TIM CNT to a word 193 5 When converting transferring a word to a word 24 BCD 194 When converting transferring DM to DM 202 5 When converting transferring data in other areas 30 ADD 233 When adding two words 352 When adding a TIM CNT to a constant 31 SUB 237 5 When subtracting a word from a word 356 5 When subtracting a constant from a TIM CNT 32 MUL 655...

Page 156: ...tput bit corresponding to the desired output point 0000 0200 The PC responds most quickly when it receives an input signal just prior to the input refresh period in the cycle Once the input bit corresponding to the signal has been turned ON the program will have to be executed once to turn ON the output bit for the desired output signal and then the input refresh and overseeing operations would ha...

Page 157: ...signal Cycle Cycle time I O refresh I O response time CPU reads input signal CPU writes output signal Output ON delay Input ON delay Overseeing Cycle time Maximum I O response time input ON delay cycle time x 2 overseeing time output ON delay The data in the following table would produce the minimum and maximum cycle times shown calculated below Input ON delay 1 5 ms Cycle time 20 ms Input refresh...

Page 158: ... Monitoring Operation and Modifying Data 7 3 1 Bit Digit Monitor 7 3 2 Force Set Reset 7 3 3 Hexadecimal BCD Data Modification 7 3 4 Changing Timer Counter SV 7 4 Program Backup and Restore Operations 7 4 1 Saving Program Memory Data 7 4 2 Restoring or Comparing Program Memory Data ...

Page 159: ...r certain types of errors before actual trial operation with the controlled system When an error occurs during program execution it can be displayed for iden tification by pressing CLR FUN and then MONTR If an error message is displayed the MONTR key can be press to access any other error messages that are stored by the system in memory If MONTR is pressed in PROGRAM mode the error message will be...

Page 160: ...operations As long as the operation is performed in RUN or MONI TOR mode the status of any bit displayed will be indicated This section provides other procedures for monitoring data as well as proce dures for modifying data that already exists in a data area Data that can be modified includes the PV present value and SV set value for any timer or counter All monitor operations in this section can ...

Page 161: ...are displayed at any one time To monitor more than one address return to the start of the proce dure and continue designating addresses Monitoring of all designated ad dresses will be maintained unless more than six addresses are designated If more than six addresses are designated the leftmost address of those being monitored will be cancelled To display addresses that are being monitored but are...

Page 162: ...cations of this monitor operation Program Read then Monitor Indicates Completion flag is ON Monitor operation is cancelled 0100 0100READ TIM 00 T00 1234 T00 0000 0100 TIM 01 Key Sequence Examples Monitoring Operation and Modifying Data Section 7 3 ...

Page 163: ...152 Bit Monitor 0000 0000 LD 0001 0001 ON 0000 CONT 0001 Word Monitor 0000 0000 CHANNEL 00 0000 CHANNEL HR 1 cH1 FFFF cH0 0000 Monitoring Operation and Modifying Data Section 7 3 ...

Page 164: ...an be pressed to turn ON the bit start the timer or increment the counter and REC RESET can be pressed to turn OFF the bit or reset the timer or counter Timers will not oper ate in PROGRAM mode SR bits cannot be turned ON and OFF with this op eration Bit status will remain ON or OFF for only one scan after pressing the key it will then return to its original status When timers or counters are rese...

Page 165: ...ce Set Reset operation The displays shown below are for the follow ing program section 0200 LD 0002 0201 TIM 00 0123 0202 LD TIM 00 0203 OR 0501 0204 AND NOT 0003 0205 OUT 0501 TIM 00 SV 0002 TIM 00 0501 0501 0003 Address Instruction Operands Example Monitoring Operation and Modifying Data Section 7 3 ...

Page 166: ...00 0501 OFF T00 0501 0123 OFF T00 0501 0000 ON T00 0501 0123 OFF T00 0501 0000 ON T00 0501 0123 OFF T00 0501 0122 OFF T00 0501 0000 ON 0000 0000 OUT 0500 7 3 3 Hexadecimal BCD Data Modification When the Bit Digit Monitor operation is being performed and a BCD or hexa decimal value is leftmost on the display CHG can be input to change the value SR words cannot be changed If a timer or counter is le...

Page 167: ...in MONITOR mode The SV can be changed while the pro gram is being executed To change the SV first display the address of the timer or counter whose SV is to be changed press the down key and then press CHG The new value can then be input numerically and WRITE pressed to change the SV When changing the SV of timers or counters while operation is stopped use PROGRAM mode and follow the procedure out...

Page 168: ...ave a 16K word program the tape must be 30 minutes long Always allow about 5 seconds of blank tape leader before the taped data begins Store only one program on a single side of a tape there is no way to identify separate programs stored on the same side of the tape If a program is longer than will fit on one side it can be split onto two sides Be sure to label the contents of all cassette tapes c...

Page 169: ... operation using the correct file number MT VER ERR Cassette tape contents differs from that in the PC Check content of tape and or the PC MT ERR Cassette tape is faulty Replace it with another 7 4 1 Saving Program Memory Data This operation is used to copy the content of Program Memory to a cassette tape The procedure is as follows Press EXT Input a file number for the data that is to be saved St...

Page 170: ...from a cassette tape or to compare Program Memory data with the contents on a cassette tape The procedure is as follows Press EXT Specify the number of the file to be restored or compared Start playing the cassette tape Within 5 seconds press SHIFT and PLAY SET to restore data or VER to compare data Program restoration or comparison continues until the final address or END 01 is reached or until t...

Page 171: ...Y FILE NO 00000012 0242MT PLAY FILE NO 00000012 0480MT RECORD END 01 1193MT DISCONTD END 01 0100 0145 RECORD END END 01 0100 0034MT PLAY FILE NO 00000012 0242MT PLAY FILE NO 00000012 0486MT RECORD END 01 0480MT DISCONTD END 01 0578 RECORD END END 01 0000 0000MT FILE NO 00000012 0000MT FILE NO 00000000 Stop restoring using CLR Program Backup and Restore Operations Section 7 4 ...

Page 172: ...161 SECTION 8 Troubleshooting 8 1 Introduction 8 2 Reading and Clearing Errors and Messages 8 3 Error Messages 8 4 Error Flags ...

Page 173: ...tomatically shut down System flags and other system and or user programmed error indications can be used to program proper actions 8 2 Reading and Clearing Errors and Messages System error messages can be displayed on the Programming Console or any other Programming Device On the Programming Console press the CLR FUN and MONTR keys If there are multiple error messages stored by the system the MONT...

Page 174: ...ill be lit and the RUN indicator will not be lit The RUN output will be OFF Error and message Probable cause Possible correction Power interruption No message Power has been interrupted for at least 10 ms Check power supply voltage and power lines Try to power up again CPU error No message Watchdog timer has exceeded maximum setting default setting 130 ms Restart system in PROGRAM mode and check p...

Page 175: ...attery Alarm Flag 1809 Cycle Time Error Flag 1903 Instruction Execution Error ER Flag A number of other error messages are detailed within this manual Errors in program input and debugging can be examined in 4 6 2 Inputting and Over writing Programs and 4 6 3 Checking the Program and errors in cassette tape operation are detailed in 7 4 Program Backup and Restore Operations Other Error Messages Er...

Page 176: ...Timer Unit Analog I O Units I O Link Unit C20K Cjj j C28K Cjj j C40K Cjj j C60K Cjj j C4K Ij Ojj C4K TM C16P Ij j Oj j C20P Ejj j C28P Ejj j C40P Ejj j C60P Ejj j C1K AD DA C4K AD C4K CN502 included with Unit To order cable sepa rately specify C4K CN502 5 cm or 40 cm One included with each Ex pansion I O Unit Cable 70 cm C20P CN711 ordered separately C20 LK011 LK011 P C20P C28P C40P C60P C20P C28P...

Page 177: ... C 24 VDC 24 VDC 16 pts Relay w socket C40K CDR D U C Transistor 1 A C28K CDT1 D U C C40K 100 to 240 VAC 24 VDC 16 pts Relay w socket 16 pts C40K CDR A U C Transistor 1 A C40K CDT1 A U C Triac 1 A C40K CDS1 A U C 24 VDC 2 pts Relay w socket C40K CAR A U C 100 VAC 22 pts Triac 1 A C40K CAS1 A U C 24 VDC 24 VDC 24 pts Relay w socket C40K CDR D U C Transistor 1 A C40K CDT1 D U C C60K 100 to 240 VAC 2...

Page 178: ... socket C20P EDR D U C N L Transistor 1 A C20P EDT1 D U C N L C28P I O Unit 100 to 240 VAC 24 VDC 16 pts Relay w socket 12 pts C28P EDR A U C N L Transistor 1 A C28P EDT1 A U C N L Triac 1A C28P EDS1 A U C N L 100 to 120 VAC Relay w socket C28P EAR A U C N L 16 pts Triac 1A C28P EAS1 A U C N L 24 VDC 24 VDC 16 pts Relay w socket C28P EDR D U C N L Transistor 1 A C28P EDT1 D U C N L C40P I O Unit 1...

Page 179: ...ecting Cable For horizontal mounting cable length 5 cm for maintenance C20P CN501 For vertical mounting cable length 40 cm for maintenance C20P CN411 I O Connecting Cable For horizontal mounting connects Cable length 5 cm C4K CN502 to C4K I O Analog Timer or Ana Cable length 50 cm C4K CN512 log I O Units for maintenance Cable length 1 m C4K CN122 I O Link Connecting Cable Cable length 70 cm for I ...

Page 180: ... 6 Power Cord and 3 pin 2 pin plug 7 Carrying Case FIT10 SET11 E Graphic Programming Console GPC Name Specifications Model number Standards GPC LCD display W battery power supply 32 kw 100 VAC w comments System Memory Cassette ordered separately 3G2C5 GPC03 E W battery power supply 32 kw 200 VAC w comments System Memory Cassette ordered separately 3G2C5 GPC04 E GPC Carrying Case W side pocket for ...

Page 181: ...nsole via cable 3G2A5 BP001 Cassette Recorder Connecting Cable Used to connect Programming Console GPC or Cassette Deck Interface Unit to a cassette deck length 1 m SCYPOR PLG01 PROM Writer Used for all K type PCs C500 PRW06 Printer Interface Unit Interface for X Y plotter or printer System Memory Cassette ordered separately 3G2A5 PRT01 E Memory Rack K type PCs w comment printing function C500 MP1...

Page 182: ... CLEAR ILC 78 04 JUMP JMP 80 05 JUMP END JME 80 08 STEP DEFINE STEP 128 09 STEP START SNXT 128 10 SHIFT REGISTER SFT 106 11 KEEP KEEP 77 12 REVERSIBLE COUNTER CNTR 93 13 DIFFERENTIATE UP DIFU 75 14 DIFFERENTIATE DOWN DIFD 75 15 HIGH SPEED TIMER TIMH 86 16 WORD SHIFT WSFT 110 20 COMPARE CMP 112 21 MOVE MOV 111 22 MOVE NOT MVN 112 23 BCD TO BINARY BIN 115 24 BINARY TO BCD BCD 115 30 BCD ADD ADD 120 ...

Page 183: ... on whether they are executed with an ON or an OFF execution condition The OFF execution time for an instruction can also vary depending on the circumstances i e whether it is in an interlocked program section and the execution condition for IL is OFF whether it is between JMP 04 00 and JME 05 00 and the execution condition for JMP 04 00 is OFF or whether it is reset by an OFF execution condition ...

Page 184: ...15 TIMH 94 5 When timing 97 to 187 5 When reset 16 WSFT 97 When shifting DM by 1 word 825 5 When shifting DM by 64 words 20 CMP 121 5 When comparing a constant with word data 212 When comparing a TIM CNT with word data 21 MOV 109 When transferring a constant to a word 196 When transferring a TIM CNT to a word 22 MVN 108 5 When inverting transferring a constant to a word 196 When inverting transfer...

Page 185: ...PX 212 5 Word 1 digit constant word 288 Word 4 digits constant word 355 TIM CNT 1 digit TIM CNT word 431 TIM CNT 4 digits TIM CNT word 77 DMPX 298 5 Word 1 digit constant word 658 5 Word 4 digits constant word 456 TIM CNT 1 digit TIM CNT word 1 080 TIM CNT 4 digits TIM CNT word 145 When shifting one word 743 When shifting 64 DM words 84 SFTR 136 to 668 When resetting 1 to 64 DM words 44 NOP 42 IL ...

Page 186: ...f designated bit with execution condition B IR SR HR TC TR AND NOT AND NOT AND NOT B Logically ANDs inverse of designated bit with execution condition B IR SR HR TC TR OR OR OR B Logically ORs status of designated bit with execution condition B IR SR HR TC TR OR NOT OR NOT OR NOT B Logically ORs inverse of designated bit with execution condition B IR SR HR TC TR AND LOAD AND LD AND LD Logically AN...

Page 187: ... TIMER TIM TIM N SV TIM N SV ON delay decrementing timer opera tion Set value 999 9 s accuracy 0 0 0 1 s Same TC bit cannot be as signed to more than one timer counter The TC bit is input as a constant N TC SV IR HR COUNTER CNT CNT N SV CNT N SV A decrementing counter SV 0 to 9999 CP count pulse R reset input The TC bit is input as a constant N TC SV IR HR Refer to table at beginning of Appendix B...

Page 188: ...of the section identified by N STEP without an operand indicates the end of a series of program sections N HR STEP START SNXT 09 SNXT 09 N SNXT resets the timers and clears the data areas used in the previous pro gram section SNTX must also be present at the end of a series of pro gram sections N HR SHIFT REGISTER SFT 10 I P R SFT 10 St E Creates a bit shift register from the starting word St thro...

Page 189: ...T 16 St E Shifts data between the start and end words in word units St E IR HR DM COMPARE CMP 20 CMP 20 Cp1 Cp2 Compares two sets of four digit hexa decimal data Cp1 and Cp2 and out puts result to GR EQ and LE Cp1 Cp2 IR SR HR TC DM MOVE MOV 21 MOV 21 S D Transfers source data S word or four digit constant to destination word D S IR SR HR TC DM D IR HR DM MOVE NOT MVN 22 MVN 22 S D Inverts source ...

Page 190: ... word R CY CY Mi Su R Mi Su IR SR HR TC DM R IR HR DM BCD MULTIPLY MUL 32 MUL 32 Md Mr R Multiplies a words data or a four digit BCD value Md and another words data Mr and outputs the result to a specified result word R Md X Mr R R 1 Md Mr IR SR HR TC DM R IR HR DM BCD DIVIDE DIV 33 DIV 33 Dd Dr R Divides a words data or a four digit BCD dividend Dd and another words data Dr and outputs result to ...

Page 191: ... IR SR HR TC DM Di IR HR TC DM R IR HR DM 16 TO 4 ENCODER DMPX 77 DMPX 77 S R Di Determines position of highest ON bit in source word s starting word S and turns ON corresponding bit s in result word R Digit designations made with Di digits rightmost digit first digit to receive converted value next digit to left number of words to be converted minus 1 S 15 0 3 0 R 3 2 1 0 0 to F S IR SR HR TC DM ...

Page 192: ...rands Function Symbol RETURN RET 93 RET 93 Indicates the end of a subroutine defi nition None I O REFRESH IORF 97 IORF 97 St E Refreshes I O words between a speci fied range Refreshes words in word units St E 00 to 09 Refer to table at beginning of Appendix B for page references ...

Page 193: ...or counters 153 Hex BCD Data Change Used to change the value of the leftmost BCD or hexadecimal word displayed during a Bit Word Monitor operation 155 SV Change SV Reset Alters the SV of a timer or counter either by incrementing or decrementing the value or by overwriting the original value with a new one 156 Program Memory Save Saves Program Memory to tape 158 Program Memory Restore Reads Program...

Page 194: ...e displayed instruction can be deleted or another instruction can be inserted before it Care should be taken to avoid inadvertent deletions as there is no way of recovering the instructions other than to re enter them When an instruction is deleted all subsequent instruction addresses are automatically adjusted so that there are no empty addresses or instructions without addresses P INS At the des...

Page 195: ... screen CLR SHIFT CONT HR LD OUT TIM CNT DM MONTR CLR Address Cancel MONTR Forced Set Reset If a bit timer or counter address is leftmost on the screen during a Bit Word Monitor operation pressing PLAY SET will turn ON the bit start the timer or increment the counter Pressing REC RESET will turn OFF the bit or reset the timer or counter These force sets and force resets are effective for one cycle...

Page 196: ...ecrementing can only be carried out if the SV has been entered as a constant The third method is to change the value properties from that of a constant to a word address or vice versa Note that the display clears after pressing the CHG key and the subsequent keystrokes determine whether the new data will be entered as a word address pressing SHIFT CH plus Word address or a constant entering data o...

Page 197: ... read Program Memory data which has been recorded on a cassette tape the keystrokes are as given here The file number must be the same as the one entered when the data was recorded The read operation will proceed from the specified start address up to the end of the tape unless halted by a CLR command The instruction must be completed before the required data is reached on the tape i e usually bef...

Page 198: ...ble indicate the flags that are turned ON and OFF according to the result of the in struction Although TIM CNT and CNTR are executed when ER is ON other instructions with a vertical arrow under the Er column are not executed if ER is ON All of the other flags in the following table will also not operate when ER is ON Instructions not shown do not affect any of the flags in the table Instructions S...

Page 199: ...1010 11 00010001 0B 00001011 12 00010010 0C 00001100 13 00010011 0D 00001101 14 00010100 0E 00001110 15 00010101 0F 00001111 16 00010110 10 00010000 17 00010111 11 00010001 18 00011000 12 00010010 19 00011001 13 00010011 20 00100000 14 00010100 21 00100001 15 00010101 22 00100010 16 00010110 23 00100011 17 00010111 24 00100100 18 00011000 25 00100101 19 00011001 26 00100110 1A 00011010 27 00100111...

Page 200: ...ment Recording Sheets This appendix contains sheets that can be copied by the programmer to record I O bit allocations and terminal assignments on the Racks as well as details of work bits data storage areas timers and counters ...

Page 201: ...Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Word Unit Bit Field device Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 I O Bits ...

Page 202: ... Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Area Word Bit Usage Notes 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Work Bits ...

Page 203: ...Word Assignment Recording Sheets Appendix F 196 Programmer Program Date Page Word Contents Notes Word Contents Notes Data Storage ...

Page 204: ...Appendix F Word Assignment Recording Sheets 197 Programmer Program Date Page TC address T or C Set value Notes TC address T or C Set value Notes Timers and Counters ...

Page 205: ... designed for flexibility al lowing the user to input all required addresses and instructions When coding programs be sure to specify all function codes for instructions and data areas or for constant for operands These will be necessary when inputting programs though a Programming Console or other Pe ripheral Device ...

Page 206: ...Program Coding Sheets Appendix G 200 Programmer Program Date Page Address Instruction Operand s Address Instruction Operand s Address Instruction Operand s ...

Page 207: ...data that is numerically equivalent to the binary value It is not used to refer to binary coded decimal Each four binary bits is equivalent to one hexadeci mal digit binary coded decimal A system used to represent numbers so that each four binary bits is numeri cally equivalent to one decimal digit bit The smallest unit of storage in a PC The status of a bit is either ON or OFF Four bits equal one...

Page 208: ...m the program or from a Program ming Device to achieve a specific purpose e g a Restart bit is turned ON and OFF to restart a Unit Control System All of the hardware and software components used to control other devices A Control System includes the PC System the PC programs and all I O de vices that are used to control or obtain feedback from the controlled system controlled system The devices th...

Page 209: ...nstruction is to be placed as op posed to the location from which data is to be taken for use in the instruction The location from which data is to be taken is called the source differentiation instruction An instruction used to ensure that the operand bit is never turned ON for more than one cycle after the execution condition goes either from OFF to ON for a Differentiate Up instruction or from ...

Page 210: ...some type of operating status Some flags such as the carry flag can also be set by the operator or program flicker bit A bit that is programmed to turn ON and OFF at a specific interval force reset The process of artificially turning OFF a bit from a Programming Device Bits are usually turned OFF as a result of program execution force set The process of artificially turning ON a bit from a Program...

Page 211: ...ectly between PCs The words are input output between the PC controlling the Master and a PC connected to the Remote I O System through an I O Link Unit or an I O Link Rack I O Link Unit A Unit used with certain PCs to create an I O Link in an Optical Remote I O System I O point The place at which an input signal enters the PC System or an output signal leaves the PC System In physical terms an I O...

Page 212: ...on line A group of conditions that lie together on the same horizontal line of a ladder diagram Instruction lines can branch apart or join together to form instruction blocks interface An interface is the conceptual boundary between systems or devices and usually involves changes in the way the communicated data is represented Interface devices perform operations as changing the coding format or s...

Page 213: ...lock with a current execution condition The current execution condi tion could be the result of a single condition or of another logic block AND Load and OR Load are the two logic block instructions LR area A data area that is used in a PC Link System so that data can be transferred between two or more PCs If a PC Link System is not used the LR area is available for use as work bits Master Short f...

Page 214: ... voltage or conductivity but can be defined as the op posite of either ON delay The delay produced between the time a signal is initiated e g by an input device or PC and the the time the signal reaches a state readable as an ON signal by a receiving party e g output device or PC one shot bit A bit that is turned ON or OFF for a specified interval of time longer than one cycle operand A bit s or w...

Page 215: ...on Peripheral devices include printers programming devices external storage media etc present value The current time left on a timer or the current count of a counter Present val ue is abbreviated PV printed circuit board A board onto which electrical circuits are printed for mounting into a comput er or electrical device program The list of instructions that tells the PC the sequence of control a...

Page 216: ...Remote I O Units The Remote I O Master Unit is mounted either to a C200H C500 C1000H or C2000H CPU Rack or an Expansion I O Rack connected to the CPU Rack Remote I O Master Unit is generally abbreviated to simply Master Remote I O Slave Unit A Unit mounted to a C200H C500 C1000H or C2000H Backplane to form a Slave Rack Remote I O Slave Unit is generally abbreviated to simply Slave Remote I O Syste...

Page 217: ...lue is abbreviated SV shift register One or more words in which data is shifted in bit digit or word units a speci fied number of units to the right or left Slave Short for Remote I O Slave Unit Slave Rack A C200H C500 C1000H or C2000H Rack containing a Remote I O Slave Unit and controlled through a Remote I O Master Unit Slave Racks are gen erally located away from the CPU Rack software error An ...

Page 218: ...e timer s set value Timers are turned ON and reset according to their ex ecution conditions TM area A memory area used to store the results of a trace transmission distance The distance that a signal can be transmitted TR area A data area used to store execution conditions so that they can be reloaded later for use with other instructions transfer The process of moving data from one location to an...

Page 219: ...ry where a word of data is stored A word address must specify sometimes by default the data area and the number of the word that is being addressed work bit A bit in a work word work word A word that can be used for data calculation or other manipulation in pro gramming i e a work space in memory A large portion of the IR area is always reserved for work words Parts of other areas not required for...

Page 220: ...branching See ladder diagram C Carry Flag See data areas cassette tape operation comparing program memory data error messages restoring program memory data saving program memory data CLC 41 See instruction set CLEAR CARRY CLC 41 See instruction set Clock Pulse Bits See data areas CMP 20 See instruction set CNTR 12 See instruction set COMPARE CMP 20 See instruction set comparing program memory data...

Page 221: ...SH IORF 97 See instruction set I O response time I O Units See Units IL 02 See instruction set ILC 03 See instruction set input bit definition of input devices definition of input point definition of input signal definition of instruction set ADD 30 Analog Timer Unit AND combining with OR use in ladder diagrams AND LD combining with OR LD use in logic blocks AND NOT use in ladder diagrams BCD 24 B...

Page 222: ...al Devices LD See instruction set LD NOT See instruction set LEDs See CPU indicators leftmost definition Less Than Flag See data areas Link Units See Units LOAD LD See instruction set LOAD NOT LD NOT See instruction set logic blocks See ladder diagram LSS See Peripheral Devices M memory areas data areas See data areas definition of program memory See program memory MLPX 76 See instruction set mnem...

Page 223: ...ion set REVERSIBLE SHIFT REGISTER SFTR 84 See instruction set rightmost definition S SBN 92 See instruction set SBS 91 See instruction set SET CARRY STC 40 See instruction set SFT 10 See instruction set SFTR 84 See instruction set SHIFT REGISTER SFT 10 See instruction set SINGLE STEP STEP 08 See instruction set SNXT 09 See instruction set Special I O Units See Units SR area See data areas standard...

Page 224: ...curacy figure removed Section 5 18 Control bits changed to be consecutive within each program Last graphic in last example in logic block instruction description LD 0500 changed to OR 0500 and LD 0002 changed to AND 0002 Section 5 11 2 Set value range changed from 00 00 and 99 99 to 00 02 and 99 99 Explanation also added Page 109 Operand 1101 was changed to 1003 in the diagram Page 116 Values with...

Page 225: ...Cat No W146 E1 5 Note Specifications subject to change without notice Printed in Japan Authorized Distributor ...

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