No.14S056-11
24
STC-CMC120APCL, STC-CMB120APCL
Specifications and Users guide
Formula of maximum frame rate
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10TAP CameraLink Clock: 85MHz
50 / 258 / Variable Partial Effective Line(VAH*) +38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
10TAP CameraLink Clock: 42.5MHz
25 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
8TAP CameraLink Clock: 85MHz
41.6 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
8TAP CameraLink Clock: 42.5MHz, 4TAP CameraLink Clock: 85MHz
20.8 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
4TAP CameraLink Clock: 42.5MHz, 2TAP CameraLink Clock: 85MHz
10.4 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
2TAP CameraLink Clock: 42.5MHz
5.2 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
3TAP CameraLink Clock: 85MHz
15.6 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
・
3TAP CameraLink Clock: 42.5MHz
7.8 / 258 / Variable Partial Effective Line(VAH*)+38) x 10^6 [fps] (Round down numbers beyond the second decimal point)
For more information please contact Aegis Electronic Group, Inc. *(888)687-6877 *[email protected] *http://www.aegiselect.com
Aegis
Electronic
Group,
Inc.