OKIDATA OL600e, Servise Manual

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Service Guide OL600e/610e/610ePS
Chapter 2 Operation Description
2.1 Control Board
The control board consists of a single chip CPU, Program & Font ROMsone DRAM for the OL600e, two
DRAMs for the OL610e an EEPROM, a host interface circuit, and a mechanism driving circuit.
(1) Single chip CPU
The single chip CPU is a custom CPU (32-bit internal bus, 16-bit external bus, 25.54 MHz clock with input
frequency from a 12.27 MHz clock) which incorporates the MIPS 3000 RISC CPU and its peripheral
devices, and has the following functions:
Built-in device Function
Chip select controller
Bus controller
DRAM controller Control of ROM DRAM and I/O device
DMA controller Transfer of image data from DRAM to video
output port
Parallel interface controller Control of Centronics parallel interface
Serial interface controller Control of RS-232C serial interface
Video output port
LED STB output port Control of LED head
Timer Generation of various control timing signals
Monitoring of paper running and paper size
Serial I/O port Control of operator panel EEPROM and options
I/O port Input and output of sensor and motor signals
(2) Program & Font ROM
OL600e/610e
The Program & Font ROM stores the equipment program and various types of fonts. EPROM or Mask
ROM is used for a Program & Font ROM. The mounting location of this Program & Font ROM varies
depending on the type of ROM (for the mounting location see 7.2).
OL610e/PS
The Program ROM & Font ROM store the HP4 emulation program and various types of fonts. Mask ROM
is used for a Program & Font ROM.