NXP Semiconductors
QN902x
User Manual of QN902x
UM10996
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
User Manual
Rev 1.3
— 05 November 2018
25 of 128
Bit
Type
Reset
Symbol
Description
31
RW
0
NC
No Connected;
30-29
RW
0
XINJ[1-0]
Select high frequency XTAL clock source
00b = Use crystal oscillator between XTAL1/XTAL2
01b = Digital clock injection to XTAL1
10b = Single-end sine wave injection to XTAL1
11b = Differential sine wave injection to XTAL1/ XTAL2
28-23
RW
10000
0b
XICTRL[5-0]
High frequency crystal bias current control
For 16MHz XTAL: IB=80uA*XICTRL/64
For 32MHz XTAL: IB=160uA*XICTRL/64
22-17
RW
10000
0b
XCSEL[5-0]
Crystal oscillator cap loading selection. The loading cap
on each side is 10+XCSEL*0.32pF. It ranges from 10pF
to 30pF, while the default is 20pF.
16
RW
0
XSMT_EN
Reserved. Wri
te ‘0’
15-14
RW
01b
BUCK_VTHL[1-0]
Reserved. Write ‘01b’
13-12
RW
1
BUCK_VTHH[1-0]
Reserved. Write ‘
11b
’
11-9
RW
010b
BUCK_TMOS[2-0]
Reserved. Write ‘0
10b
’
8
RW
0
BUCK_FC
Reserved. Write ‘0’
7
RW
1
BUCK_AGAIN
Reserved. Write ‘
1
’
6
RW
0
BUCK_ADRES
R
eserved. Write ‘0’
5-4
RW
10b
BUCK_BM[1-0]
Reserved. Write ‘
10b
’
3-0
RW
0101b
TST_CPREF[3-0]
Reserved. Write ‘0
101b
’
Table 24 LO1
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
XD
IV
LO
_T
ES
T_INT
LO
_T
ST
_C
P[3]
LO
_T
ST
_C
P[2]
LO
_T
ST
_C
P[1]
LO
_T
ST
_C
P[0]
LO
_IC
PH
LO
_B
M
_F
IL
[1]
LO
_B
M
_F
IL
[0]
LO
_B
M
_DAC
[1]
LO
_B
M
_DAC
[0]
LO
_B
M
_C
M
L_C
[1]
LO
_B
M
_C
M
L_C
[0]
LO
_B
M
_C
M
L_D[
1
]
LO
_B
M
_C
M
L_D[
0
]
LO
_B
M
_B
VCO
[1]
LO
_B
M
_B
VCO
[0]
LO
_VC
O
_A
M
P[2]
LO
_VC
O
_A
M
P[1]
LO
_VC
O
_A
M
P[0]
PMU
X_E
N
P
A
_P
HAS
E[1
]
PA
_P
HAS
E[0
]
D
A
C
_T
ES
T_E
N
D
A
C
_T
ES
T[7]
D
A
C
_T
ES
T[6]
D
A
C
_T
ES
T[5]
D
A
C
_T
ES
T[4]
D
A
C
_T
ES
T[3]
D
A
C
_T
ES
T[2]
D
A
C
_T
ES
T[1]
D
A
C
_T
ES
T[0]
0
0
0
1
0
1
0
0
1
0
1
0
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Bit
Type
Reset
Symbol
Description
31
RW
0
XDIV
XTAL frequency selection
0 = 16MHz
1 = 32MHz
30
RW
0
LO_TEST_INT
Reserved. Write ‘0’
29-26
RW
0101b
LO_TST_CP[3-0]
Reserved. Write ‘0
101b
’