MSC711x Application Development System (MSC711xADS) Reference Manual, Rev. 1
26
Freescale Semiconductor
Board-Level Functions
Figure 3-3. MSC711xADS Timing System
Watchdog Timer
1
Device Resources
Timers
Timer Module
DSP Extended Core
Input
Clock
Timer Clock
4
1
Clocks can be disabled in Stop mode. Disables PLL, core clock, ECore clock, AHB clock, IPBus clock, and
2
Clocks can be disabled at this point in Stop mode. Disables ECore clock, AHB clock, IPBus clock, and APB clock.
3
Clocks are disabled at this point in Wait and Stop modes. Disables the ECore clock.
4
Clocks can be disabled at this point in Stop mode. Disables the input clock used in timer clock generation.
HLTACK
32-bit
IPBus
CLKIN
AHB Clock
to Crossbar Switch, DMA,
to 32-Bit Watchdog Timer
TDM Peripheral
to TDM Clock, Frame Sync
EVNT
Event
Port
MUX
MUX
UART
to UART Tx, Rx
M2, Boot ROM
CPU
3
SC1400 Core
DIV
(/1 to /25)
MULT
(x1 to x28)
PLL
MUX
CLKOUT
Wake-up
Control
APB Clock
CLKO
IPBus Clock / 2
Timer Clock / 2
/24
/1 to /216
MU
X
External Memory Interface
to External. Memory. Controller
to DDR Clock Pins
Clock Synthesis
Module
Timer B
Outputs
Timer A
Outputs
Debug
Port
I2C
to Serial
MUX
/22, ..., /3840
Ethernet MAC
to Ethernet MAC
/2, /4,.../126
MDC
AHB
Clock
RX_CLK
TX_CLK
5
Clocks can be disabled at this point in Stop mode. Disables the watchdog timer clock.
IPBus Clock
AHB DIV
(/2)
2
ECore clock
Core Clock
DDR Clock
6
HLTREQ
STOPCTL
CLKCTL
5
Watchdog Clock
/2
6
Clocks can be disabled at this point in Stop mode. Disables the DDR clock.
AHB
Clock
IPBus
Clock
/2
/26
Timer
Bit Clock
Generator
Clock
APB Clock.