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Appendix A: LAPB Data Link Control protocol
553-3001-211 Standard 3.00 August 2005
LAPB subset of the HDLC protocol and transmitted serially to the line at a
rate determined by the downloaded parameters.
The QPC513 card receives data serially from the line, packaged in LAPB
information frames. After determining that a block is error free the data is
supplied to the Circuit Switch Equipment as a block.
Frame structure
All transmissions are in frames and each frame conforms to the format shown
in Table 280 on
page 903
. In particular, frame elements for applications using
a port on the QPC513 follow these LAPB conventions:
•
Zero information field is permitted.
•
Inter-frame time fill is accomplished by transmitting contiguous flags.
This is compatible with AT&T Technical Requirement BX.25 and
ADCCP standards.
•
Extensions for the address field or the control field are not permitted.
This requirement imposes constraints to satellite operations.
•
Individual station addresses are assigned in service change for balanced
configuration. The default ESDI address is 10000000. The far-end
default address is 11000000.
•
The LAPB basic control field (modules 8) format is implemented.
•
Frame check sequence is implemented in accordance with LAPB
procedures.
Summary of Contents for Circuit Card
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Page 4: ...Page 4 of 906 Revision history 553 3001 211 Standard 3 00 August 2005...
Page 18: ...Page 18 of 906 Contents 553 3001 211 Standard 3 00 August 2005...
Page 78: ...Page 78 of 906 Overview 553 3001 211 Standard 3 00 August 2005...
Page 100: ...Page 100 of 906 Acceptance tests 553 3001 211 Standard 3 00 August 2005...
Page 156: ...Page 156 of 906 Option settings 553 3001 211 Standard 3 00 August 2005...
Page 192: ...Page 192 of 906 NT4N39AA CP Pentium IV Card 553 3001 211 Standard 3 00 August 2005...
Page 378: ...Page 378 of 906 NT5K21 XMFC MFE card 553 3001 211 Standard 3 00 August 2005...
Page 384: ...Page 384 of 906 NT6D70 SILC Line card 553 3001 211 Standard 3 00 August 2005...
Page 388: ...Page 388 of 906 NT6D71 UILC Line card 553 3001 211 Standard 3 00 August 2005...
Page 544: ...Page 544 of 906 NT8D02 and NTDK16 Digital Line cards 553 3001 211 Standard 3 00 August 2005...
Page 546: ...Page 546 of 906 NT8D03 Analog Line card 553 3001 211 Standard 3 00 August 2005...
Page 564: ...Page 564 of 906 NT8D09 Analog Message Waiting Line card 553 3001 211 Standard 3 00 August 2005...
Page 626: ...Page 626 of 906 NT8D14 Universal Trunk card 553 3001 211 Standard 3 00 August 2005...
Page 720: ...Page 720 of 906 NTAK09 1 5 Mb DTI PRI card 553 3001 211 Standard 3 00 August 2005...
Page 734: ...Page 734 of 906 NTAK10 2 0 Mb DTI card 553 3001 211 Standard 3 00 August 2005...
Page 744: ...Page 744 of 906 NTAK20 Clock Controller daughterboard 553 3001 211 Standard 3 00 August 2005...
Page 762: ...Page 762 of 906 NTAK79 2 0 Mb PRI card 553 3001 211 Standard 3 00 August 2005...
Page 772: ...Page 772 of 906 NTBK22 MISP card 553 3001 211 Standard 3 00 August 2005...
Page 844: ...Page 844 of 906 NTVQ01xx Media Card 553 3001 211 Standard 3 00 August 2005...
Page 850: ...Page 850 of 906 NTVQ55AA ITG Pentium card 553 3001 211 Standard 3 00 August 2005...
Page 884: ...Page 884 of 906 QPC841 Quad Serial Data Interface card 553 3001 211 Standard 3 00 August 2005...
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