CHAPTER 5 CLOCK GENERATOR
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User’s Manual U11302EJ4V0UM
Figure 5-9. Main System Clock Stop Function (2/2)
(c) Operation when CSS is set after setting MCC during main system clock operation
5.5.2 Subsystem clock operations
During operation with the subsystem clock (when bit 5 (CLS) of the processor clock control register (PCC) is set to
1), the following operations are carried out.
(a) The minimum instruction execution time remains constant (122
µ
s during operation at 32.768 kHz) irrespective
of the setting of bits 0 to 2 (PCC0 to PCC2) of PCC.
(b) Watchdog timer counting stops.
Caution Do not execute the STOP instruction while the subsystem clock is operating.
MCC
CSS
CLS
Main system clock oscillation
Subsystem clock oscillation
CPU clock
