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User’s Manual U11302EJ4V0UM
CHAPTER 5 CLOCK GENERATOR
5.1 Clock Generator Functions
The clock generator generates the clock to be supplied to the CPU and peripheral hardware. The following two
types of system clock oscillators are available.
(1) Main system clock oscillator
This circuit oscillates at frequencies of 1 to 5.0 MHz. Oscillation can be stopped by executing the STOP
instruction or setting the processor clock control register (PCC).
(2) Subsystem clock oscillator
The circuit oscillates at a frequency of 32.768 kHz. Oscillation cannot be stopped. If the subsystem clock
oscillator is not used, the internal feedback resistor can be disabled by the processor clock control register
(PCC). This decreases the power consumption in the STOP mode.
The noise eliminator operates automatically to reduce the effect of switching noise during VFD display.
5.2 Clock Generator Configuration
The clock generator consists of the following hardware.
Table 5-1. Clock Generator Configuration
Item
Configuration
Control registers
Processor clock control register (PCC)
Display mode register 0 (DSPM0)
Display mode register 1 (DSPM1)
Oscillator
Main system clock oscillator
Subsystem clock oscillator
