7 – Manufacturing Test
IGLOO2 FPGA Evaluation Kit User Guide
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2P5V
C107 pin 2
2.375<2P5V<2.625
3P3V_LDO
C99 pin 1
3.135<3P3V_LDO<3.465
2P5V_LDO
C100 pin 1
2.375<2P5V_LDO<2.625
DDR_VTT
C22 pin 1
0.88< DDR3_VTT<.92
1P0V_PHY
C36 pin 1
0.95< 1P0V_PHY<1.05
1P8V
C31 pin 1
1.78<1P8V<1.82
3. LEDs (top left of board) corresponding to their respective power rails must glow.
4. Ripples on power rails should be /- 5% of respective voltage rail.
Clock Measurement
Measure clock signal at Y2 pin 3 and ensure that the stable 50 MHz signal is available.
Reset Measurement
Measure reset signal at resistor R14 and ensure that this is 3.3 V and held High.
FPGA Programming
Check whether IGLOO2 has been successfully programmed through the JTAG interface.