KSZ8463_eval_bd_user_guide_1.1.docx
Micrel, Inc.
July 17, 2013
Confidential
Rev. 1.1
9/16
Signal Name on
MII connectors
Description
Pin
numbers
Signal direction
in PHY mode:
(Connector J3)
Signal direction
in MAC mode:
(Connector J4)
Test Points
TX_EN
Transmit enable
13
input
output
TP6
TX_ER
Transmit error
11
input
GND
TP15
TXD3
Transmit data bit 3
17
input
output
TP18
TXD2
Transmit data bit 2
16
Input
output
TP17
TXD1
Transmit data bit 1
15
Input
output
TP16
TXD0
Transmit data bit 0
14
input
output
TP7
TX_CLK
Transmit clock
12
output
input
TP5
COL
Collision detection
18
output
input
TP1
CRS
Carrier sense
19
output
input
-
RX_DV
Receive data valid
8
output
input
TP2
RX_ER
Receive error
10
GND
input
-
RXD3
Receive data bit 3
4
output
input
TP13
RXD2
Receive data bit 2
5
output
input
TP12
RXD1
Receive data bit 1
6
output
input
TP11
RXD0
Receive data bit 0
7
output
input
TP4
RX_CLK
Receive clock
9
output
input
TP3
MDIO
Data I/O
Bi-directional
Bi-directional
-
MDC
Clock
input
input
-
VCC
1, 20, 21,
40
No connection
VCC (+5V)
GND
22 - 39
GND
GND
TP14, TP19
The KSZ8463ML/FML does not provide the RX_ER signal in PHY mode operation and the TX_ER signal
in MAC mode operation. Normally, RX_ER indicates a receive error coming from the physical layer device
and TX_ER indicates a transmit error from the MAC device. Since the switch filters error frames, these MII
error signals are not used by the KSZ8463ML/FML. So, for PHY mode operation, if the device interfacing
with the KSZ8463ML/FML has an RX_ER input pin, it needs to be tied low. And, for MAC mode operation,
if the device interfacing with the KSZ8463ML/FML has a TX_ER input pin, it also needs to be tied low.
3.3.2 RMII Port Configuration (KSZ8463RL and KSZ8463FRL)
The Reduced Media Independent Interface (RMII) specifies a low pin count Media Independent Interface
(MII). RMII provides a common interface between physical layer and MAC layer devices, and has the
following key characteristics:
•
Supports data rate either 10Mbps or 100Mbps.
•
Uses a single 50 MHz clock reference for both transmit and receive data.
•
Provides independent 2-bit wide transmit and receive data paths.
•
Contains two distinct groups of signals: one for transmission and the other for reception.
Connector J3 is not configured for use with RMII. RMII interfacing must use connector J4, for connection
to an external RMII PHY such as the KSZ8081RNA, KSZ8081RNB or KSZ8081RND eval board.
