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Wo.
Item
Specifications
4
Drive
2-axis linear
・ 2-axis linear interpolation drive, and 2-axis linear
function
interpolation drive
interpolation drive under linear speed constant control can
(continued)
be performed.
・ Linear interpolation is performed toward the specified
coordinates from the current coordinates.
Positional errors for the specified straight line are
± 0.5 LSB.
・ The absolute and relative addresses that can be specified
for coordinates range from -2,147,483,647 to +2,147,483,647
(32 bits).
・ As with IWDEX drive, asymmetrical acceleration/deceleration
drive can be used for positioning.
2-axis circular
・ 2-axis circular interpolation drive, and 2-axis circular
interpolation drive
interpolation drive under linear speed constant control can
be performed.
・ Circular interpolation is performed toward the specified
coordinates from the current coordinates on the circular
curve specified by the center-point or passing-point
coordinates.
・ Positional errors for the specified circuit curve are ± 1
LSB for center-point circular interpolation or ± 2 LSB for
passing-point interpolation.
・ The absolute addresses that can be specified for coordinates
range from -2,147,483,647 to +2,147,483,647 (32 bits).
The relative addresses range from -8,388,607 to +8,388,607
(24 bits).
・ As with IWDEX drive, asymmetrical acceleration/deceleration
drive can be used for positioning.
Linear speed constant
・ Control is performed to keep the synthesized speed of the
control
two axes working for interpolation drive constant.
・ When two axes output pulses simultaneously, the next pulse
output cycle is multiplied by 1.414.
5
Counter func Address counter
・ 32-bit counter that manages absolute addresses by counting
tion
drive output pulses
・ Three dedicated comparators are used to detect a specific
count and output ADWIWT that requests a counter interrupt.
・ Cpon detection of a match by the comparator, pulse output
can be decelerated and then stopped, or stopped immediately.
Pulse counter
・ 32-bit counter that manages actual positions by counting
external pulse signals
・ Three dedicated comparators are used to detect a specific
count and output CWTIWT that requests a counter interrupt.
・ Cpon detection of a match by the comparator, pulse output
can be decelerated and then stopped, or stopped immediately.
Pulse differential count ・ 32-bit counter that detects differences in the number of
er
pulses by counting any two types of pulse signals
・ Three dedicated comparators are used to detect a specific
count value and output DFLIWT that requests a counter
interrupt.
・ Cpon detection of a match by the comparator, pulse output
can be decelerated and then stopped, or stopped immediately.
・ By count specification selection, this counter can also be
used as a pulse counter that counts any one type of pulse
signals.
Pulse cycle counter
・ 32-bit counter that measures one cycle of any type of
pulses by counting 20 MHz reference clock signals
・ Three dedicated comparators are used to detect a specific
measurement value and output SPDIWT that requests a counter
interrupt.
・ Cpon detection of a match by the comparator, pulse output
can be decelerated and then stopped, or stopped immediately.
・ Because this counter measures time, it can also be used as a
32-bit timer.
Count data latch/clearan ・ This function latches count data of a counter at a specific
ce function
latch timing and holds it till the next latch timing.
・ Latch data can be read at any time.
・ The count data of a counter can be cleared at detection of
latch timing.