Measurement Computing Data Translation DT3034, User Manual

Page: 144 / 178

Specifications
143
Effective number of bits @
1 kHz sine wave, 2 channels:
10 kHz sine wave, 2 channels:
sine wave, 2 channels:
14.4 bits typical (at 150 kS/s aggregate rate)
14.2 bits typical (at 150 kS/s aggregate rate)
13.5 bits typical (at 150 kS/s aggregate rate with
sine wave of 20 kHz)
Total Harmonic Distortion @ 1 kHz input
–
82 dB typical (at 250 kS/s rate)
Channel crosstalk

80 dB @ 1 kHz
Data throughput
Single channel:
Multiple channel (scan):
500 kSamples/s, 0.01% accuracy
450 kSamples/s, 0.01% accuracy
External A/D sample clock
Input type:
Input load:
High-level input voltage:
Low-level input voltage:
Hysteresis:
High-level input current:
Low-level input current:
Minimum pulse width:
Maximum frequency:
Termination:
Schmitt trigger, falling-edge sensitive
1 HCT14 (TTL)
2.0 V minimum
0.8 V maximum
0.4 V (minimum); 1.5 V (maximum)
1.0

A
–
1.0

A
100 ns (high); 150 ns (low)
500 kHz
33

series resistor
External A/D digital (TTL) trigger
Input type:
Input load:
High-level input voltage:
Low-level input voltage:
Hysteresis:
High-level input current:
Low-level input current:
Minimum pulse width:
Termination:
Schmitt trigger, rising- and falling-edge sensitive
1 HCT14 (TTL)
2.0 V minimum
0.8 V maximum
0.4 V (minimum); 1.5 V (maximum)
1.0

A
–
1.0

A
100 ns (high); 100 ns (low)
33

series resistor
External analog trigger
Input type:
Threshold voltage:
Threshold range:
Threshold resolution:
Hysteresis:
Input impedance:
Maximum input voltage:
Minimum pulse width:
Threshold sensitive
Programmable
–
10 V to +10 V (includes TTL)
8 bits/78 mV per LSB
50 mV typical
12 k

/20 pF typical
±20 V
100 ns (high); 100 ns (low)
Table 23: A/D Subsystem Specifications (cont.)
Feature DT3034 Specifications