Measurement Computing Data Translation DT3034, User Manual

Page: 92 / 178

Principles of Operation
91
When it detects a trigger, the board outputs the values in the output FIFO to the DACs at the
same time. Even samples (0, 2, 4, and so on) are written to entry 0 in the channel list; odd
samples (1, 3, 5, and so on) are written to entry 1 in the channel list. The operation repeats
continuously until no more buffers are on the subsystem queue or you stop the operation.
Refer to
page 92 for more information on buffers.
Ensure that the host computer transfers data to the output FIFO fast enough so that the output
FIFO does not empty completely; otherwise, an output FIFO underrun error results. Note that
the output FIFO counter increments each time the host loads a value into the output FIFO and
decrements each time the DAC reads a value from the output FIFO; the counter is reset to 0
when the output FIFO is reset. To avoid the output FIFO underrun error in
continuously-paced mode, the host computer can read the output FIFO counter to determine
how many samples remain in the output FIFO, and transfer more data before the output FIFO
empties.
The conversion rate is determined by the frequency of the D/A output clock. The maximum
throughput rate in this mode is 500 kHz (500 kSamples/s) in 100 mV steps or 200 kHz
(200 kSamples/s) in full-scale steps. Note that rate is system-dependent. Refer to
page 88 for
more information on the D/A output clock.
To select continuously-paced analog output mode, use software to specify the following
parameters:
• Set the dataflow as Continuous.
• Set WrapSingleBuffer to False to use multiple buffers. A minimum of two buffers is
recommended.
• Set the trigger source as any of the supported trigger sources. Refer to page 89 for more
information on the supported trigger sources.
Waveform Generation
Use waveform generation mode if you want to output waveforms repetitively.
Before this process can begin, the host computer must transfer the entire waveform pattern to
output to the DACs from a single buffer allocated in computer memory into the output FIFO
on the board. Use software to allocate a single buffer and to specify the waveform pattern.
If you are using a single DAC, the waveform pattern can range from 2 to 4,096 samples; if you
are using two DACs, the waveform pattern can range from 2 to 2,048 samples. Specify both
DACs in the analog output channel list.
When it detects a trigger, the board cycles through the analog output channel list, converting
and outputting the specified waveform for the specified DACs. When the output FIFO
empties, the board issues a retransmit pulse to the output FIFO. This allows the board to
output the same pattern continuously to the DACs without having to reload the output FIFOs.
The buffer wrap mode must be single in this mode; refer to
page 92 for more information on
buffers.