ACKSTAT
Meaning:
Acknowledge the STATUS stage of a CONTROL transfer.
Location:
EPSTALLS.6
Set:
The CPU sets this bit after it has finished servicing a CONTROL transfer request.
This instructs the SIE to send the ACK handshake to the status stage of the
current CONTROL transfer. Until the CPU sets this bit, the SIE responds to the
status stage of the CONTROL transfer with a NAK handshake.
Clear:
The SIE clears this bit whenever a SETUP token arrives.
POR:
ACKSTAT=0
Chip Reset:
ACKSTAT=0
Bus Reset:
ACKSTAT=0
Pwr Down:
Read-only
FYI:
A fast way to set the ACKSTAT register bit is to set bit 0 of the SPI command
byte. All Maxim example code uses this method.
Programming Notes:
When the CPU receives a Setup Data Available Interrupt Request (SUDAVIRQ bit, page 66), it
clears the SUDAVIRQ bit by writing “1” to it, and then reads the eight data bytes from the
SUDFIFO into memory. The CPU then inspects the eight bytes to determine the nature of the
USB request. If the request is in error or unknown, the CPU sets the STLSTAT bit to answer the
status stage with a STALL handshake (page 64).
If the CPU recognizes the request, it services the request, and when finished sets ACKSTAT=1
to tell the SIE to send the ACK handshake to the status stage to terminate the CONTROL
transfer. Until the CPU either acknowledges or stalls the transfer, the SIE automatically returns
the NAK handshake to the CONTROL transfer status stage.
A C program that interprets the 8 bytes of setup data usually consists of one or more
case
statements that check for all the legal combination of bytes in the setup packet. A convenient
way to handle the STALL is to make the default case a statement that stalls the CONTROL
transfer. (see the STLSTAT bit, page 64).
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