MaximIntegrated 8-4
MAX31782 User’s Guide
Revision 0; 8/11
8.1.5GeneratingaSTART
To initiate a data transfer, the I
2
C master controller must first issue a START command . The master I
2
C controller’s flow
when attempting to issue a START command is shown in
. A START command is generated by setting the
I2CSTART bit to 1 . The I
2
C controller monitors the status of SDA and SCL until it can generate a START condition . If
the c o n t r o l l e r has to wait longer than the period specified in the timeout register, the I
2
C controller concludes that
there is a bus error and sets the I2CTOI flag .
If the bus is not busy, the I
2
C master controller attempts to generate a START . Because the SDA line is feedback into
the device, when the master generates a START, it can also detect the START condition . When a start condition is
detected, the I
2
C START interrupt flag (I2CSRI) will be set and an interrupt will be generated if enabled . The I2CBUS
bit will be set to indicate that the I
2
C bus is now in use and the I2CSTART bit will be cleared .
Figure 8-3. Master I
2
C Generated START and STOP
I2CSTART = 1
START GENERATION
I2CBUSY = 1
N
Y
Y
N
N
N
Y
REPEATED
START?
GENERATE START
I2CSRI = 1
I2CBUS = 1
I2CTOI = 1
Y
Y
N
I2CTOI = 1
I2CSTART = 0
I2CBUSY = 0
I2CSTOP = 0
I2CBUSY = 0
Y
Y
N
I2CBUS = 1
TIMEOUT?
STOP GENERATION
I2CSTOP = 1
I2CBUSY = 1
TRANSFERRING
BYTE?
N
GENERATE STOP
TRANSFERRING
BYTE?
START
DETECTED?
I2CSPI = 1
I2CBUS = 0
Y
N
STOP
DETECTED?
TIMEOUT?
Y
TIMEOUT?
