AMx36 • SSI & BiSS C-mode
Data bit structure:
bit
7
…
…
0
MSB
…
…
LSB
CRC
Correct transmission control (inverted output). Cyclic Redundancy Check is an
error checking which is the result of a “Redundancy Checking” calculation
performed on the message contents. This is intended to check whether
transmission has been performed properly. It is 4-bit long.
Polynomial: X
4
+X
1
+1 (binary: 10011)
Logic circuit:
6.5 Implemented registers
Register (hex)
Function
42 - 43
44 … 47
48
49
4B … 4D
4E - 4F
50 … 54
55
56
N° of bits used for singleturn resolution
57
N° of bits used for multiturn resolution
78 … 7D
7E - 7F
All registers described in this section are listed as follows:
Function name
[Address, Attribute]
Description of the function and specification of the default value.
MAN AMx36 SSI_BiSS E 1.1.odt
6 - BiSS C-mode interface
24 of 36