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5.5 Logic Buffer
5.
5.1 Block Diagram of Logic Buffer
5.5.2 Explanation of Logic Buffer circuit operation
5.5.2.1 Explanation of function of E-Buffer Board
① R, G, B data(6EA data(R0, G0, B0, R1, G1 and B1), which have been inputted and rearranged from Logic
MAIN via connector(EL1 and EL2), are outputted through buffer IC to COF Board with 80 Pin
Connector(EC01~EC04).
② The rearranged DATA are sent via EF01 Connector to COF connected with F-Buffer.
③ The power of Vcc 5V, which will be used at E-Buffer and F-Buffer, has been sent from Logic Main and
converted through a regulator to be used as voltage of 6V, and the power of 75V, which is needed for
Address Power of COF, are sent through LP1 Connector from F-Buffer to SAMPS and applied to COF
Board via Damping resistance (2.2Ω)/1W).
5.5.2.2 Explanation of functions of F-Buffer Board
① R, G, B data (6EA data(R0, G0, B0, R1, G1 and B1), which have been inputted and rearranged
from E-buffer via connector FE01, are outputted through buffer IC to COF Board with 80 Pin Connector
(FC04~FC07).
② The power of Vcc 5V, which will be used at F-Buffer, has been sent from Logic Main and converted
through a regulator to be used as voltage of 6V, and the power of 75V, which is needed for Address
Power of COF, are sent through LP1 Connector from F-Buffer to SAMPS and applied to Board via
Damping resistance (2.2Ω)/1W).
L O G I C M A I N O U T P U T P A R T S
V C C 5 V
R . G . B
r e a r r a n g e
d a t a
B u f f e r
B u f f e r
B u f f e r
B u f f e r
B u f f e r
B u f f e r
B u f f e r
C o n n e c t o r
( E C 0 1 )
C o n n e c t o r
( E C 0 2 )
C o n n e c t o r
( E C 0 3 )
C o n n e c t o r
( E C 0 4 )
C o n n e c t o r
( F C 0 5 )
C o n n e c t o r
( F C 0 6 )
C o n n e c t o r
( F C 0 7 )
R G B D a t a &
I C C o n t r o l s i g n a l
R G B D a t a &
IC C o n t r o l s i g n a l
R G B D a t a &
IC C o n t r o l s i g n a l
R G B D a t a &
I C C o n t r o l s i g n a l
T o C O F B / D
T o C O F B / D
T o C O F B / D
T o C O F B / D
E L 1 , E L 2
E F 0 1
E F 0 2
7
5
V
6
V
6
V
7
5
V
7
5
V
6
V
6
V
7
5
V
E F 0 1
E F 0 2
7 5 V
6 V
E - B u f f e r B / D
F - B u f f e r B / D
R
e
g
u
la
t
o
r
R G B D a t a &
I C C o n t r o l s i g n a l
R G B D a t a &
IC C o n t r o l s i g n a l
R G B D a t a &
IC C o n t r o l s i g n a l
T o C O F B / D
T o C O F B / D
T o C O F B / D
7
5
V
6
V
6
V
7
5
V
7
5
V
6
V
L P 1
F r o m
S M P S ( 7 5 V )
