2-13
Hardware Gate
You can enable a hardware gate through software. A hardware gate is an
externally applied, level-sensitive, digital signal that determines when the
analog output channels on the quad DACs in the update group are
updated.
You connect the gate signal to the GATE IN pin (pin 21) of the main I/O
connector. If the hardware gate is enabled, the software-selectable state of
the gate signal determines whether the channels are updated, as follows:
●
If you specify a positive gate, the channels are updated only if the
signal to GATE IN is high; if the signal goes low, the channels are no
longer updated.
●
If you specify a negative gate, the channels are updated only if the
signal to GATE IN is low; if the signal goes high, the channels are no
longer updated.
When using the hardware gate, the way the channels are updated depends
on whether you are using an internal pacer clock or an external pacer
clock. These considerations are described as follows:
●
Internal pacer clock
—
The internal pacer clock stops counting
down when the gate signal goes inactive. When the gate signal goes
active again, the internal pacer clock resumes counting where it left
off.
●
External pacer clock
—
The signal from the external pacer clock
continues uninterrupted while the gate signal is inactive; updates are
always synchronized to the external pacer clock.
Figure 2-5 illustrates a positive hardware gate with both an external pacer
clock and an internal pacer clock. The polarity of the external pacer clock
is falling edge.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com