Reference Number: 327043-001
69
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
PRE_COUNT
• Title:
DRAM Precharge commands.
• Category:
PRE Events
• Event Code:
0x02
• Max. Inc/Cyc:
1,
Register Restrictions:
0-3
• Definition:
Counts the number of DRAM Precharge commands sent on this channel.
RPQ_CYCLES_FULL
• Title:
Read Pending Queue Full Cycles
• Category:
RPQ Events
• Event Code:
0x12
• Max. Inc/Cyc:
1,
Register Restrictions:
0-3
• Definition:
Counts the number of cycles when the Read Pending Queue is full. When the RPQ is
full, the HA will not be able to issue any additional read requests into the iMC. This count should be
similar count in the HA which tracks the number of cycles that the HA has no RPQ credits, just
somewhat smaller to account for the credit return overhead. We generally do not expect to see
RPQ become full except for potentially during Write Major Mode or while running with slow DRAM.
This event only tracks non-ISOC queue entries.
RPQ_CYCLES_NE
• Title:
Read Pending Queue Not Empty
• Category:
RPQ Events
• Event Code:
0x11
• Max. Inc/Cyc:
1,
Register Restrictions:
0-3
• Definition:
Counts the number of cycles that the Read Pending Queue is not empty. This can then
be used to calculate the average occupancy (in conjunction with the Read Pending Queue Occu-
pancy count). The RPQ is used to schedule reads out to the memory controller and to track the
requests. Requests allocate into the RPQ soon after they enter the memory controller, and need
credits for an entry in this buffer before being sent from the HA to the iMC. They deallocate after
the CAS command has been issued to memory. This filter is to be used in conjunction with the
occupancy filter so that one can correctly track the average occupancies for schedulable entries and
scheduled requests.
RPQ_INSERTS
• Title:
Read Pending Queue Allocations
• Category:
RPQ Events
• Event Code:
0x10
• Max. Inc/Cyc:
1,
Register Restrictions:
0-3
• Definition:
Counts the number of allocations into the Read Pending Queue. This queue is used to
schedule reads out to the memory controller and to track the requests. Requests allocate into the
RPQ soon after they enter the memory controller, and need credits for an entry in this buffer before
Table 2-72. Unit Masks for PRE_COUNT
Extension
umask
[15:8]
Description
PAGE_MISS
bxxxxxxx1
Precharges due to page miss:
Counts the number of DRAM Precharge commands sent on this
channel as a result of page misses. This does not include explicit
precharge commands sent with CAS commands in Auto-Precharge
mode. This does not include PRE commands sent as a result of the
page close counter expiration.
PAGE_CLOSE
bxxxxxx1x
Precharge due to timer expiration:
Counts the number of DRAM Precharge commands sent on this
channel as a result of the page close counter expiring. This does not
include implicit precharge commands sent in auto-precharge mode.
