![Intel S2600IP Technical Product Specification Download Page 73](http://html1.mh-extra.com/html/intel/s2600ip/s2600ip_technical-product-specification_2072184073.webp)
Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPSPlatform Management Overview
Revision 1.1
59
Intel order number G34153-003
mismatch is detected, then the default action after logging the SEL entry is to reset the system.
The BIOS setup utility provides an option to disable or enable system reset by the BMC for
detection of this condition.
4.3.4.5
CATERR Sensor
The BMC supports a CATERR sensor for monitoring the system CATERR signal.
The sensor is rearmed on power-on (AC or DC power on transitions). It is not rearmed on
system resets in order to avoid multiple SEL events that could occur due to a potential reset
loop if the CATERR keeps recurring, which would be the case if the CATERR was due to an
MSID mismatch condition.
On EPSD boards, the CATERR signal from each CPU are tied together and routed to the BMC
as one signal. When the BMC detects that this aggregate CATERR signal has asserted, it can
then go through PECI to query each CPU to determine which one was the source of the error
and write an OEM code identifying the CPU slot into an event data byte in the SEL entry. If
PECI is non-
functional (it isn’t guaranteed in this situation), then the OEM code should indicate
that the source is unknown.
Event data byte 2 and byte 3 for CATERR sensor SEL events
ED2 - CATERR type.
0: Unknown
1: CATERR
2: CPU Core Error (not supported on EPSD Platforms Based on Intel
®
Xeon
®
Processor E5
4600/2600/2400/1600 Product Families)
3: MSID Mismatch
ED3 - CPU bitmap that causes the system CATERR.
[0]: CPU0
[1]: CPU1
[2]: CPU2
[3]: CPU3
IPMI Sensor Characteristics
1. Event reading type code: 03h (Digital discrete)
2. Sensor type code:
07h (Processor)
3. Rearm type:
Manual
The following sensor-specific offsets are supported:
Table 18. Supported CATERR Sensor Offsets
Offset
Description
Event Logging
01h
State asserted
Assertion and deassertion
4.3.4.6
MSID Mismatch Sensor
The BMC supports a
MSID Mismatch
sensor for monitoring for the fault condition that will occur
if there is a power rating incompatibility between a baseboard and an a processor
Summary of Contents for S2600IP
Page 14: ......