Functional Architecture
Intel
®
Server Board S5500BC TPS
Intel order number: E42249-003
Revision 1.0
28
3.2.10
Demand and Patrol Scrub
The Intel
®
Integrated Memory Controller supports demand and patrol scrubbing. A scrub fixes a
correctable error in memory. A 4-byte ECC is attached to each 32-byte “payload”. An error is
detected when the ECC calculated from the payload does not match the ECC read from
memory. The error is corrected by modifying the ECC, payload, or both, and then writing both
the ECC and payload back to memory. Only one demand or patrol scrub can be completed at a
time. Patrol scrubs are intended to ensure that data with a correctable error does not remain in
DRAM long enough to cause further corruption and an uncorrectable particle error. The Intel
®
QuickPath Memory Controller issues a Patrol Scrub at a rate sufficient to write every line once a
day. The maximum is one scrub every 82 ms with 64 GB of memory.
3.3 Intel
®
I/O Hub (IOH) 5500 chipset
The Intel
®
I/O Hub (IOH) 5500 chipset component provides a connection point between various
I/O components and Intel
®
QuickPath Interconnect based processors. The following table shows
the features supported by the chipset.
Table 7. Intel
®
IOH 5500 Chipset Features
Chipset
Intel
®
QuickPath
Interconnect Ports
Processor
PCI Express*
Lanes
Manageability
Intel
®
IOH 5500
chipset
2
Intel
®
Xeon
®
processor 5500
series
24 Node
Manager
The Intel
®
IOH 5500 chipset on the Intel
®
Server Board S5500BC has the following features:
Two Intel
®
QuickPath Interconnect interfaces with full-width links (20 lanes in each
direction).
Two x16 PCI Express* Gen2 ports are also configurable as x8 and x4 links compliant to
the PCI Express* Base Specification, Revision 2.0. Each port supports up to 8
GB/s/direction peak bandwidth.
One x4 Enterprise South Bridge Interface (ESI) link interface.
Support Controller Link interface between the IOH and ICH portions of the
Manageability Engine subsystem.
Manageability Integrated support: Manageability Engine (ME) and external memory
controller for manageability firmware; ME network access; and System Defense Feature
support enabled by firmware.
Reduced Media Independent Interface (RMII) support.
Supports an SMBus Specification Revision 2.0 slave interface for server management
with Packet Error Checking.
Power Management Support
Intel
®
Virtualization Technology for Directed I/O (Intel
®
VT-d), Second Revision for
server security.
Integrated IOxAPIC
